component
SUD40N10-25-E3
Public Made by Adomby adom
Vishay Intertech MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownSUD40N10-25-E3
Vishay Intertech · MOSFETs · TO-252
SUD40N10-25-E3 from Vishay Intertech, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate, with gate-source voltage limited to ±20 V and gate threshold VGS(th) specified at 1.0 V to 3.0 V for VDS = VGS, ID = 250 µA. |
| 2 | D | passive | Drain, which is also connected to the mounting tab; rated for 100 V drain-source voltage and 40 A continuous drain current at TC = 25 °C. |
| 3 | S | passive | Source, with continuous source (diode conduction) current IS rated at 40 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | VDS | 100 | V | VGS = 0 V, ID = 250 µA | 2 | ||
| Gate Threshold Voltage | VGS(th) | 1 | 3 | V | VDS = VGS, ID = 250 µA | 2 | |
| Gate-Body Leakage | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ± 20 V | 2 | |
| Zero Gate Voltage Drain Current | IDSS | 1 | µA | VDS = 100 V, VGS = 0 V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 50 | µA | VDS = 100 V, VGS = 0 V, TJ = 125 °C | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 250 | µA | VDS = 100 V, VGS = 0 V, TJ = 175 °C | 2 | ||
| On-State Drain Current | ID(on) | 70 | A | VDS = 5 V, VGS = 10 V | 2 | ||
| Drain-Source On-State Resistance | RDS(on) | 0.02 | 0.025 | Ω | VGS = 10 V, ID = 40 A | 2 | |
| Drain-Source On-State Resistance | RDS(on) | 0.05 | Ω | VGS = 10 V, ID = 40 A, TJ = 125 °C | 2 | ||
| Drain-Source On-State Resistance | RDS(on) | 0.063 | Ω | VGS = 10 V, ID = 40 A, TJ = 175 °C | 2 | ||
| Drain-Source On-State Resistance | RDS(on) | 0.022 | 0.028 | Ω | VGS = 4.5 V, ID = 20 A | 2 | |
| Total Gate Charge | Qg | 40 | 60 | nC | VDS = 50 V, VGS = 10 V, ID = 40 A | 2 | |
| Gate Resistance | Rg | 1 | 3.5 | Ω | 2 | ||
| Turn-On Delay Time | td(on) | 8 | 13 | ns | VDD = 50 V, RL = 1.25 Ω, ID ≅ 40 A, VGEN = 10 V, Rg = 2.5 Ω | 2 | |
| Rise Time | tr | 40 | 60 | ns | VDD = 50 V, RL = 1.25 Ω, ID ≅ 40 A, VGEN = 10 V, Rg = 2.5 Ω | 2 | |
| Turn-Off Delay Time | td(off) | 15 | 25 | ns | VDD = 50 V, RL = 1.25 Ω, ID ≅ 40 A, VGEN = 10 V, Rg = 2.5 Ω | 2 | |
| Fall Time | tf | 80 | 120 | ns | VDD = 50 V, RL = 1.25 Ω, ID ≅ 40 A, VGEN = 10 V, Rg = 2.5 Ω | 2 | |
| Pulsed Current | ISM | 70 | A | TC = 25 °C | 2 | ||
| Diode Forward Voltage | VSD | 1 | 1.5 | V | IF = 40 A, VGS = 0 V | 2 | |
| Source-Drain Reverse Recovery Time | trr | 75 | 120 | ns | IF = 40 A, dI/dt = 100 A/µs | 2 | |
| Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | 40 | A | TJ = 175 °C, TC = 25 °C | 1 | ||
| Continuous Drain Current | ID | 23 | A | TJ = 175 °C, TC = 125 °C | 1 | ||
| Pulsed Drain Current | IDM | 70 | A | 1 | |||
| Continuous Source Current (Diode Conduction) | IS | 40 | A | 1 | |||
| Avalanche Current | IAS | 40 | A | 1 | |||
| Single Pulse Avalanche Energy | EAS | 80 | mJ | L = 0.1 mH, Duty Cycle ≤ 1 % | 1 | ||
| Maximum Power Dissipation | PD | 136 | W | TC = 25 °C | 1 | ||
| Maximum Power Dissipation | PD | 3 | W | TA = 25 °C | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | 175 | °C | 1 | ||
| Junction-to-Ambient | RthJA | 15 | 18 | °C/W | t ≤ 10 s | 1 | |
| Junction-to-Ambient | RthJA | 40 | 50 | °C/W | Steady State | 1 | |
| Junction-to-Case | RthJC | 0.85 | 1.1 | °C/W | 1 |
CAD (KiCad official)
- Symbol:
SUD40N10-25-E3 - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files:
sud40n10-25-e3-etched.step/sud40n10-25-e3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sud40n10-25-e3.step/sud40n10-25-e3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (7 pp, sha256
0e1d9ace0878f750, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).