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SUD40N08-16-E3

Public Made by Adom

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Vishay Intertech MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SUD40N08-16-E3

Vishay Intertech · MOSFETs · TO-252

SUD40N08-16-E3 from Vishay Intertech, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate of the N-channel MOSFET, with gate-source voltage VGS limited to 20 V.
2 D passive Drain, connected to the tab, with continuous drain current ID of 40 A at TC = 25C.
3 S passive Source of the N-channel MOSFET, with continuous source (diode conduction) current IS of 40 A.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package TO-252
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 80 V 1
Gate-Source Voltage VGS 20 V 1
Continuous Drain Current ID 40 A TC = 25C 1
Continuous Drain Current ID 30 A TC = 125C 1
Pulsed Drain Current IDM 60 A 1
Continuous Source Current (Diode Conduction) IS 40 A 1
Avalanche Current IAR 40 A 1
Repetitive Avalanche Energy EAR 80 mJ L = 0.1 mH, Duty Cycle 1% 1
Maximum Power Dissipation P 136 W TC = 25C 1
Maximum Power Dissipation PD 3 W TA = 25C 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 175 C 1
Junction-to-Ambient 15 18 C/W t <= 10 sec 1
Junction-to-Ambient RthJA 40 50 C/W Steady State 1
Junction-to-Case RthJC 0.85 1.1 C/W 1
Drain-Source Breakdown Voltage V(BR)DSS 80 V VGS = 0 V, ID = 250 A 2
Gate Threshold Voltage VGS(th) 2 4 V VDS = VGS, ID = 250 A 2
Gate-Body Leakage IGSS 100 nA VDS = 0 V, VGS = 20 V 2
Zero Gate Voltage Drain Current IDSS 1 A VDS = 80 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS 50 A VDS = 80 V, VGS = 0 V, TJ = 125C 2
Zero Gate Voltage Drain Current IDSS 250 A VDS = 80 V, VGS = 0 V, TJ = 175C 2
On-State Drain Current ID(on) 60 A VDS = 5 V, VGS = 10 V 2
Drain-Source On-State Resistance rDS(on) 0.013 0.016 VGS = 10 V, ID = 40 A 2
Drain-Source On-State Resistance rDS(on) 0.027 VGS = 10 V, ID = 40 A, TJ = 125C 2
Drain-Source On-State Resistance rDS(on) 0.037 VGS = 10 V, ID = 40 A, TJ = 175C 2
Forward Transconductance gfs 45 S VDS = 15 V, ID = 40 A 2
Total Gate Charge Qg 42 60 nC VDS = 40 V, VGS = 10 V, ID = 40 A 2
Gate Resistance Rg 0.5 2.7 ohm 2
Turn-On Delay Time td(on) 12 20 ns VDD = 40 V, RL = 1.0 2
Rise Time tr 52 80 ns VDD = 40 V, RL = 1.0 2
Turn-Off Delay Time td(off) 25 38 ns VDD = 40 V, RL = 1.0, ID = 40 A, VGEN = 10 V, Rg = 2.5 2
Fall Time tf 10 15 ns VDD = 40 V, RL = 1.0, ID = 40 A, VGEN = 10 V, Rg = 2.5 2
Pulsed Current ISM 60 A 2
Diode Forward Voltage VSD 1 1.5 V IF = 40 A, VGS = 0 V 2
Source-Drain Reverse Recovery Time trr 45 70 ns IF = 40 A, di/dt = 100 A/s 2

CAD (KiCad official)

  • Symbol: SUD40N08-16-E3
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: sud40n08-16-e3-etched.step / sud40n08-16-e3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sud40n08-16-e3.step / sud40n08-16-e3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (5 pp, sha256 10a470b026d4f363, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF