component
STWD100PYW83F
Public Made by Adomby adom
STMicroelectronics Monitors & Reset Circuits, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTWD100PYW83F
STMicroelectronics · Monitors & Reset Circuits · SC-70-5
STWD100PYW83F from STMicroelectronics, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | WDO | output | Active-low watchdog output, asserted when WDI is not toggled within the timeout period tWD; open drain (external pull-up to a supply up to 6 V required) or push-pull depending on version. |
| 2 | GND | power_in | Ground. |
| 3 | EN | input | Enable input with internal 63 kΩ typ. (32 to 100 kΩ) pull-down, so the device is enabled if left floating; a pulse of at least 1 µs on EN clears the watchdog timer and glitches under 100 ns are ignored. |
| 4 | WDI | input | Watchdog input that must be toggled within tWD to clear the internal timer; pulses of at least 1 µs are detected and glitches under 100 ns are ignored. |
| 5 | VCC | power_in | Supply voltage, 2.7 to 5.5 V operating (absolute maximum 7.0 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SC-70-5 |
| Category | Power Management ICs |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating voltage | VCC | 2.7 | 5 | 5.5 | V | 12 | |
| VCC supply current | ICC | 13 | 26 | µA | 12 | ||
| Open drain output leakage current | ILO | -1 | 1 | µA | From output to the GND or VCC | 12 | |
| Input leakage current (WDI) | -1 | 1 | µA | 12 | |||
| Input high voltage (WDI, EN) (x VCC) | VIH | 0.7 | V | 0.7 VCC | 12 | ||
| Input low voltage (WDI, EN) (x VCC) | VIL | 0.3 | V | 0.3 VCC | 12 | ||
| Output low voltage (WDO) | VOL | 0.3 | V | VCC ≥ 2.7 V, ISINK = 1.2 mA | 12 | ||
| Output low voltage (WDO) | VOL | 0.4 | V | VCC ≥ 4.5 V, ISINK = 3.2 mA | 12 | ||
| Output high voltage (WDO), push-pull (x VCC) | VOH | 0.8 | V | VCC ≥ 2.7 V, ISOURCE = 500 µA; 0.8 VCC | 12 | ||
| EN input pulse width | 1 | µs | 12 | ||||
| EN glitch rejection | 100 | ns | 12 | ||||
| EN-to-WDO delay | 200 | ns | WDO asserts for minimum of 10 µs even if EN transitions high | 12 | |||
| EN pull-down resistance | 32 | 63 | 100 | kΩ | 12 | ||
| Timer startup voltage | VSTART | 1.9 | 2.2 | 2.7 | V | 13 | |
| Watchdog timeout period STWD100xY | tWD | 1.12 | 1.6 | 2.24 | s | STWD100xY | 13 |
| Watchdog active time | tPW | 140 | 210 | 280 | ms | 13 | |
| WDI-to-WDO delay | 150 | ns | 13 | ||||
| WDI pulse width | 1 | µs | 13 | ||||
| WDI glitch rejection | 100 | ns | 13 | ||||
| VCC supply voltage | VCC | 2.7 | 5.5 | V | Operating and AC measurement conditions | 12 | |
| Ambient operating temperature | TA | -40 | 125 | °C | 12 | ||
| Storage temperature | TSTG | -55 | 150 | °C | VCC off | 11 | |
| Lead solder temperature | TSLD | 260 | °C | 10 seconds | 11 | ||
| Input or output voltage | VIO | -0.3 | V | -0.3 to VCC + 0.3 | 11 | ||
| Supply voltage | VCC | -0.3 | 7 | V | 11 | ||
| Output current | IO | 20 | mA | 11 | |||
| Power dissipation | PD | 320 | mW | 11 |
CAD (KiCad official)
- Symbol:
STWD100PYW83F - Footprint:
Package_TO_SOT_SMD:SOT-353_SC-70-5 - 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files:
stwd100pyw83f-etched.step/stwd100pyw83f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stwd100pyw83f.step/stwd100pyw83f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (20 pp, sha256
2ec54876f17739de, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).