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Contents

README

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STU6NF10

STMicroelectronics · MOSFETs · IPAK

STU6NF10 from STMicroelectronics, in a IPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate terminal, rated for a gate-source voltage of ±20 V maximum, with a gate threshold of 2 V min to 4 V max at VDS = VGS, ID = 250 µA.
2 D passive Drain terminal, also connected to the tab, rated for a drain-source voltage of 100 V and a continuous drain current of 6 A at TC = 25 °C.
3 S passive Source terminal, with a continuous source-drain diode current of 6 A max and 24 A pulsed.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package IPAK
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: STU6NF10
  • Footprint: Package_TO_SOT_THT:TO-251-3_Vertical
  • 3D model: IPAK (KiCad packages3D, STEP)
  • 3D model files: stu6nf10-etched.step / stu6nf10-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stu6nf10.step / stu6nf10.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (14 pp, sha256 d9c94475aec0956c, retrieved 2026-10-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF