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STSPIN32F0602

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TQFP-64(10x10)

STSPIN32F0602 from STMicroelectronics, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PB8 bidirectional MCU general-purpose I/O PB8, 5 V-tolerant and FM+ capable (FTf).
2 VSS power_in MCU digital ground.
3 VDD power_in MCU digital power supply.
4 PC13 bidirectional MCU general-purpose I/O PC13, standard 3.3 V I/O (TC).
5 PC14 bidirectional MCU general-purpose I/O PC14, standard 3.3 V I/O (TC).
6 PC15 bidirectional MCU general-purpose I/O PC15, standard 3.3 V I/O (TC).
7 PF0 bidirectional MCU general-purpose I/O PF0, 5 V-tolerant (FT).
8 PF1 bidirectional MCU general-purpose I/O PF1, 5 V-tolerant (FT).
9 NRST bidirectional MCU reset pin, bidirectional with embedded weak pull-up resistor.
10 VSSA power_in MCU analog ground.
11 VDDA power_in MCU analog power supply; absolute maximum VDDA is -0.3 V to 4 V.
12 PA0 bidirectional MCU general-purpose I/O PA0, 3.3 V-tolerant and directly connected to the ADC (TTa).
13 PA1 bidirectional MCU general-purpose I/O PA1, 3.3 V-tolerant and directly connected to the ADC (TTa).
14 PA2 bidirectional MCU general-purpose I/O PA2, 3.3 V-tolerant and directly connected to the ADC (TTa).
15 PA3 bidirectional MCU general-purpose I/O PA3, 3.3 V-tolerant and directly connected to the ADC (TTa).
16 PA4 bidirectional MCU general-purpose I/O PA4, 3.3 V-tolerant and directly connected to the ADC (TTa).
17 PA5 bidirectional MCU general-purpose I/O PA5, 3.3 V-tolerant and directly connected to the ADC (TTa).
18 PA6 bidirectional MCU general-purpose I/O PA6, 3.3 V-tolerant and directly connected to the ADC (TTa).
19 PA7 bidirectional MCU general-purpose I/O PA7, 3.3 V-tolerant and directly connected to the ADC (TTa).
20 PB0 bidirectional MCU general-purpose I/O PB0, 3.3 V-tolerant and directly connected to the ADC (TTa).
21 PB1 bidirectional MCU general-purpose I/O PB1, 3.3 V-tolerant and directly connected to the ADC (TTa).
22 VDD power_in MCU digital power supply.
23 VSS power_in MCU digital ground.
24 OD output Open-drain comparator output; the open-drain voltage is limited to -0.3 V to 21 V.
25 CIN input Comparator positive input; the comparator input voltage is limited to -0.3 V to 20 V.
26 SGND power_in Driver signal ground; all voltages in the absolute maximum ratings are referred to SGND.
27 PGND power_in Driver power ground for the low-side and high-side gate drivers.
28 LVG1 output Phase 1 low-side gate driver output; below 1 V at 10 mA sink with VCC above 3 V, and forced low when EN is low.
29 LVG2 output Phase 2 low-side gate driver output; below 1 V at 10 mA sink with VCC above 3 V, and forced low when EN is low.
30 LVG3 output Phase 3 low-side gate driver output; below 1 V at 10 mA sink with VCC above 3 V, and forced low when EN is low.
31 RES4 unconnected Reserved pin, must be left floating.
32 NC unconnected Not connected.
33 OUT1 passive Phase 1 high-side floating common voltage (switch node); absolute maximum VOUT is VBOOT - 21 V to VBOOT + 0.3 V.
34 HVG1 output Phase 1 high-side gate driver output, limited to VOUT - 0.3 V to VBOOT + 0.3 V.
35 BOOT1 power_in Phase 1 bootstrap supply voltage; absolute maximum VBOOT is -0.3 V to 620 V.
36 NC unconnected Not connected.
37 NC unconnected Not connected.
38 NC unconnected Not connected.
39 NC unconnected Not connected.
40 OUT2 passive Phase 2 high-side floating common voltage (switch node); absolute maximum VOUT is VBOOT - 21 V to VBOOT + 0.3 V.
41 HVG2 output Phase 2 high-side gate driver output, limited to VOUT - 0.3 V to VBOOT + 0.3 V.
42 BOOT2 power_in Phase 2 bootstrap supply voltage; absolute maximum VBOOT is -0.3 V to 620 V.
43 NC unconnected Not connected.
44 NC unconnected Not connected.
45 NC unconnected Not connected.
46 OUT3 passive Phase 3 high-side floating common voltage (switch node); absolute maximum VOUT is VBOOT - 21 V to VBOOT + 0.3 V.
47 HVG3 output Phase 3 high-side gate driver output, limited to VOUT - 0.3 V to VBOOT + 0.3 V.
48 BOOT3 power_in Phase 3 bootstrap supply voltage; absolute maximum VBOOT is -0.3 V to 620 V.
49 NC unconnected Not connected.
50 RES5 unconnected Reserved pin, must be left floating.
51 VCC power_in Driver low-side and logic supply voltage; absolute maximum VCC is -0.3 V to 21 V.
52 RES1 unconnected Reserved pin, must be left floating.
53 RES2 unconnected Reserved pin, must be left floating.
54 RES3 unconnected Reserved pin, must be left floating.
55 PA12 bidirectional MCU general-purpose I/O PA12, 5 V-tolerant (FT).
56 PA13 bidirectional MCU I/O PA13, also SWDIO system debug data, 5 V-tolerant (FT).
57 PA14 bidirectional MCU I/O PA14, also SWDCLK system debug clock, 5 V-tolerant (FT).
58 PA15 bidirectional MCU general-purpose I/O PA15, 5 V-tolerant (FT).
59 PB3 bidirectional MCU general-purpose I/O PB3, 5 V-tolerant (FT).
60 PB4 bidirectional MCU general-purpose I/O PB4, 5 V-tolerant (FT).
61 PB5 bidirectional MCU general-purpose I/O PB5, 5 V-tolerant (FT).
62 PB6 bidirectional MCU general-purpose I/O PB6, 5 V-tolerant and FM+ capable (FTf).
63 PB7 bidirectional MCU general-purpose I/O PB7, 5 V-tolerant and FM+ capable (FTf).
64 BOOT0 input Dedicated boot memory selection pin (BOOT0).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STSPIN32F0602
  • Footprint: Package_QFP:TQFP-64_10x10mm_P0.5mm
  • 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stspin32f0602-etched.step / stspin32f0602-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stspin32f0602.step / stspin32f0602.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (32 pp, sha256 0d817a2e1b19f4a0, retrieved 2026-10-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF