component
STSP84028UL65-HXY
Public Made by Adomby adom
HXY MOSFET ESD And Surge Protection (TVS/ESD), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTSP84028UL65-HXY
HXY MOSFET · ESD And Surge Protection (TVS/ESD) · SOP-8
STSP84028UL65-HXY from HXY MOSFET, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 | passive | Protected line terminal shown in the circuit diagram paired with pin 2 on the same protection element; the datasheet gives no pin name. |
| 2 | 2 | passive | Protected line terminal shown in the circuit diagram paired with pin 1 on the same protection element; the datasheet gives no pin name. |
| 3 | 3 | passive | Protected line terminal shown in the circuit diagram paired with pin 4 on the same protection element; the datasheet gives no pin name. |
| 4 | 4 | passive | Protected line terminal shown in the circuit diagram paired with pin 3 on the same protection element; the datasheet gives no pin name. |
| 5 | 5 | passive | Protected line terminal shown in the circuit diagram paired with pin 6 on the same protection element; the datasheet gives no pin name. |
| 6 | 6 | passive | Protected line terminal shown in the circuit diagram paired with pin 5 on the same protection element; the datasheet gives no pin name. |
| 7 | 7 | passive | Protected line terminal shown in the circuit diagram paired with pin 8 on the same protection element; the datasheet gives no pin name. |
| 8 | 8 | passive | Protected line terminal shown in the circuit diagram paired with pin 7 on the same protection element; the datasheet gives no pin name. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HXY MOSFET |
| Package | SOP-8 |
| Category | Circuit Protection |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reverse Working Voltage | VRWM | 2.8 | V | 2 | |||
| Breakdown Voltage | VBR | 3 | V | IT = 2µA | 2 | ||
| Breakdown Voltage (snap-back) | VSB | 3 | V | ISB= 50mA | 2 | ||
| Reverse Leakage Current | IR | 1 | µA | VRWM = 2.8V | 2 | ||
| Clamping Voltage | VC | 6 | V | IPP = 1A (8 x 20μs pulse) | 2 | ||
| Clamping Voltage | VC | 16 | V | IPP = 30A (8 x 20μs pulse) | 2 | ||
| Peak Pulse Power | PPP | 550 | W | tp = 8/20 μs, Tamb = 25°C | 1 | ||
| Maximum lead temperature for soldering | TL | 260 | °C | 10s | 1 | ||
| Storage Temperature Range | Tstg | -55 | 150 | °C | 1 | ||
| Operating Temperature Range | Top | -55 | 150 | °C | 1 | ||
| Maximum junction temperature | Tj | 150 | °C | 1 | |||
| IEC61000-4-2 ESD air discharge | -30 | 30 | kV | air discharge | 1 | ||
| IEC61000-4-2 ESD contact discharge | -30 | 30 | kV | contact discharge | 1 | ||
| IEC61000-4-4 (EFT) | 40 | A | 1 | ||||
| Junction Capacitance | CJ | 1 | pF | VR = 0V, f = 1MHz | 2 |
CAD (KiCad official)
- Symbol:
STSP84028UL65-HXY - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
stsp84028ul65-hxy-etched.step/stsp84028ul65-hxy-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stsp84028ul65-hxy.step/stsp84028ul65-hxy.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HXY MOSFET datasheet (4 pp, sha256
7a89d73163d6b028, retrieved 2026-10-31, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).