component
STS6P3LLH6
Public Made by Adomby adom
STMicroelectronics MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTS6P3LLH6
STMicroelectronics · MOSFETs · SO-8
STS6P3LLH6 from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the P-channel STripFET H6 Power MOSFET; the datasheet labels pins 1, 2 and 3 as S. |
| 2 | S | passive | Source terminal of the P-channel STripFET H6 Power MOSFET; the datasheet labels pins 1, 2 and 3 as S. |
| 3 | S | passive | Source terminal of the P-channel STripFET H6 Power MOSFET; the datasheet labels pins 1, 2 and 3 as S. |
| 4 | G | input | Gate terminal of the P-channel Power MOSFET; gate-source voltage is limited to ±20 V per Table 1. |
| 5 | D | passive | Drain terminal of the P-channel Power MOSFET; the datasheet labels pins 5, 6, 7 and 8 as D. |
| 6 | D | passive | Drain terminal of the P-channel Power MOSFET; the datasheet labels pins 5, 6, 7 and 8 as D. |
| 7 | D | passive | Drain terminal of the P-channel Power MOSFET; the datasheet labels pins 5, 6, 7 and 8 as D. |
| 8 | D | passive | Drain terminal of the P-channel Power MOSFET; the datasheet labels pins 5, 6, 7 and 8 as D. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate-body leakage current | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ±20 V | 3 | |
| Static drain-source on-resistance | RDS(on) | 24 | 30 | mΩ | VGS = 10 V, ID = 3 A | 3 | |
| Static drain-source on-resistance | RDS(on) | 38 | 50 | mΩ | VGS = 4.5 V, ID = 3 A | 3 | |
| Drain-source voltage | VDS | 30 | V | 2 | |||
| Gate-source voltage | VGS | -20 | 20 | V | 2 | ||
| Drain current (continuous) | ID | 6 | A | Tamb = 25 °C | 2 | ||
| Drain current (continuous) | ID | 4 | A | Tamb = 100 °C | 2 | ||
| Drain current (pulsed) | IDM | 24 | A | Pulse width limited by safe operating area | 2 | ||
| Total power dissipation | PTOT | 2.7 | W | Tamb = 25 °C | 2 | ||
| Storage temperature range | Tstg | -55 | 150 | °C | 2 | ||
| Operating junction temperature | TJ | 150 | °C | 2 | |||
| Thermal resistance, junction-to-ambient | RthJA | 47 | °C/W | When mounted on 1 inch² FR-4 board, 2 oz. Cu., t ≤ 10 s | 2 | ||
| Drain-source breakdown voltage | V(BR)DSS | 30 | V | VGS = 0 V, ID = 250 µA | 3 | ||
| Zero gate voltage drain current | IDSS | 1 | µA | VGS = 0 V, VDS = 30 V | 3 | ||
| Zero gate voltage drain current | IDSS | 10 | µA | VGS = 0 V, VDS = 30 V, TC = 125 °C | 3 | ||
| Gate threshold voltage | VGS(th) | 1 | V | VDS = VGS, ID = 250 µA | 3 | ||
| Input capacitance | Ciss | 1450 | pF | VDS = 24 V, f = 1 MHz, VGS = 0 V | 3 | ||
| Output capacitance | Coss | 178 | pF | VDS = 24 V, f = 1 MHz, VGS = 0 V | 3 | ||
| Reverse transfer capacitance | Crss | 120 | pF | VDS = 24 V, f = 1 MHz, VGS = 0 V | 3 | ||
| Total gate charge | Qg | 12 | nC | VDD = 24 V, ID = 6 A, VGS = 4.5 V | 3 | ||
| Gate-source charge | Qgs | 4.4 | nC | VDD = 24 V, ID = 6 A, VGS = 4.5 V | 3 | ||
| Gate-drain charge | Qgd | 5 | nC | VDD = 24 V, ID = 6 A, VGS = 4.5 V | 3 | ||
| Turn-on delay time | td(on) | 15 | ns | VDD = 24 V, ID = 3 A, RG = 4.7 Ω, VGS = 10 V | 3 | ||
| Rise time | tr | 15 | ns | VDD = 24 V, ID = 3 A, RG = 4.7 Ω, VGS = 10 V | 3 | ||
| Turn-off delay time | td(off) | 24 | ns | VDD = 24 V, ID = 3 A, RG = 4.7 Ω, VGS = 10 V | 3 | ||
| Fall time | tf | 21 | ns | VDD = 24 V, ID = 3 A, RG = 4.7 Ω, VGS = 10 V | 3 | ||
| Source-drain current | ISD | 6 | A | 4 | |||
| Source-drain current (pulsed) | ISDM | 24 | A | 4 | |||
| Forward on voltage | VSD | 1.1 | V | ISD = 3 A, VGS = 0 V | 4 | ||
| Reverse recovery time | trr | 15 | ns | ISD = 3 A, di/dt = 100 A/µs, VDD = 16 V, TJ = 150 °C | 4 | ||
| Reverse recovery charge | Qrr | 6.5 | nC | ISD = 3 A, di/dt = 100 A/µs, VDD = 16 V, TJ = 150 °C | 4 | ||
| Reverse recovery current | IRRM | 0.9 | A | ISD = 3 A, di/dt = 100 A/µs, VDD = 16 V, TJ = 150 °C | 4 |
CAD (KiCad official)
- Symbol:
STS6P3LLH6 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
sts6p3llh6-etched.step/sts6p3llh6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sts6p3llh6.step/sts6p3llh6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (14 pp, sha256
f8219ad7a60bce8e, retrieved 2026-10-29, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).