component
STPM32TR
Public Made by Adomby adom
STMicroelectronics Energy Metering, QFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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STPM32TR
STMicroelectronics · Energy Metering · QFN-24-EP(4x4)
STPM32TR from STMicroelectronics, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLKOUT/ZCR | output | Zero-crossing output or system clock output (configurable), voltage 0 to VCC. |
| 2 | CLKIN/XTAL2 | input | External clock input or crystal oscillator 2 input, voltage 0 to VCC. |
| 3 | XTAL1 | input | Crystal oscillator 1 input, voltage 0 to VCC. |
| 4 | LED1 | output | Programmable pulse output 1 for energy pulses or sigma-delta bitstream, voltage 0 to VCC. |
| 5 | LED2 | output | Programmable pulse output 2 for energy pulses or sigma-delta bitstream, voltage 0 to VCC. |
| 6 | INT1 | output | Programmable interrupt 1 output or sigma-delta bitstream output, voltage 0 to VCC. |
| 7 | EN | input | Enable pin for device operation control, voltage 0 to VCC. |
| 8 | VIP1 | input | Positive voltage input for primary channel measurement, voltage -0.3 V to 0.3 V. |
| 9 | VIN1 | input | Negative voltage input for primary channel measurement, voltage -0.3 V to 0.3 V. |
| 10 | IIP1 | input | Positive current input for primary channel measurement, voltage -0.3 V to 0.3 V. |
| 11 | IIN1 | input | Negative current input for primary channel measurement, voltage -0.3 V to 0.3 V. |
| 12 | VREF1 | power_out | Voltage reference 1 output from internal bandgap reference, voltage 1.16 V to 1.18 V. |
| 13 | GND_REF | power_in | Analog ground reference for voltage reference 1. |
| 14 | GNDA | power_in | Analog ground (shield) for analog measurement circuits. |
| 15 | VDDA | power_out | Analog power supply regulator output, 3.0 V typical. |
| 16 | GND_REG | power_in | Ground reference for internal regulators and digital circuits. |
| 17 | VCC | power_in | Main supply voltage input, voltage range 3.0 V to 3.6 V. |
| 18 | GNDD | power_in | Digital ground. |
| 19 | VDDD | power_out | Digital power supply regulator output, 1.2 V typical. |
| 20 | SYN | input | Synchronization pin for pulse generation or measurement register latching, voltage 0 to VCC. |
| 21 | SCS | input | Chip-select pin for SPI interface or interface mode selection at power-up, voltage 0 to VCC. |
| 22 | SCL | input | SPI serial clock input, voltage 0 to VCC. |
| 23 | MOSI/RXD | input | SPI master-out-slave-in data input or UART receive data input, voltage 0 to VCC. |
| 24 | MISO/TXD | output | SPI master-in-slave-out data output or UART transmit data output, voltage 0 to VCC. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | QFN-24-EP(4x4) |
| Category | Data Acquisition |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
STPM32TR - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm - 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
stpm32tr-etched.step/stpm32tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stpm32tr.step/stpm32tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (122 pp, sha256
fc11ae6e2a323f49, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STPM32TR
**STMicroelectronics** · Energy Metering · QFN-24-EP(4x4)
STPM32TR from STMicroelectronics, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLKOUT/ZCR | output | Zero-crossing output or system clock output (configurable), voltage 0 to VCC. |
| 2 | CLKIN/XTAL2 | input | External clock input or crystal oscillator 2 input, voltage 0 to VCC. |
| 3 | XTAL1 | input | Crystal oscillator 1 input, voltage 0 to VCC. |
| 4 | LED1 | output | Programmable pulse output 1 for energy pulses or sigma-delta bitstream, voltage 0 to VCC. |
| 5 | LED2 | output | Programmable pulse output 2 for energy pulses or sigma-delta bitstream, voltage 0 to VCC. |
| 6 | INT1 | output | Programmable interrupt 1 output or sigma-delta bitstream output, voltage 0 to VCC. |
| 7 | EN | input | Enable pin for device operation control, voltage 0 to VCC. |
| 8 | VIP1 | input | Positive voltage input for primary channel measurement, voltage -0.3 V to 0.3 V. |
| 9 | VIN1 | input | Negative voltage input for primary channel measurement, voltage -0.3 V to 0.3 V. |
| 10 | IIP1 | input | Positive current input for primary channel measurement, voltage -0.3 V to 0.3 V. |
| 11 | IIN1 | input | Negative current input for primary channel measurement, voltage -0.3 V to 0.3 V. |
| 12 | VREF1 | power_out | Voltage reference 1 output from internal bandgap reference, voltage 1.16 V to 1.18 V. |
| 13 | GND_REF | power_in | Analog ground reference for voltage reference 1. |
| 14 | GNDA | power_in | Analog ground (shield) for analog measurement circuits. |
| 15 | VDDA | power_out | Analog power supply regulator output, 3.0 V typical. |
| 16 | GND_REG | power_in | Ground reference for internal regulators and digital circuits. |
| 17 | VCC | power_in | Main supply voltage input, voltage range 3.0 V to 3.6 V. |
| 18 | GNDD | power_in | Digital ground. |
| 19 | VDDD | power_out | Digital power supply regulator output, 1.2 V typical. |
| 20 | SYN | input | Synchronization pin for pulse generation or measurement register latching, voltage 0 to VCC. |
| 21 | SCS | input | Chip-select pin for SPI interface or interface mode selection at power-up, voltage 0 to VCC. |
| 22 | SCL | input | SPI serial clock input, voltage 0 to VCC. |
| 23 | MOSI/RXD | input | SPI master-out-slave-in data input or UART receive data input, voltage 0 to VCC. |
| 24 | MISO/TXD | output | SPI master-in-slave-out data output or UART transmit data output, voltage 0 to VCC. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | QFN-24-EP(4x4) |
| Category | Data Acquisition |
| Pins | 25 |
## CAD (KiCad official)
- Symbol: `STPM32TR`
- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm`
- 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files: `stpm32tr-etched.step` / `stpm32tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stpm32tr.step` / `stpm32tr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586183916181475328) (122 pp, sha256 `fc11ae6e2a323f49`, retrieved 2026-10-07, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/stpm32tr-datasheet.pdf)