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STPIC6D595MTR

STMicroelectronics · Shift Registers · SO-16

STPIC6D595MTR from STMicroelectronics, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Logic supply voltage, 4.5 V to 5.5 V recommended (7 V absolute maximum).
2 SER IN input Serial data input to the 8-bit shift register, with setup and hold times of 10 ns min relative to the SRCK rising edge.
3 DRAIN0 passive Open-drain DMOS output 0, rated 20 V with 100 mA continuous sink current and 250 mA current limit.
4 DRAIN1 passive Open-drain DMOS output 1, rated 20 V with 100 mA continuous sink current and 250 mA current limit.
5 DRAIN2 passive Open-drain DMOS output 2, rated 20 V with 100 mA continuous sink current and 250 mA current limit.
6 DRAIN3 passive Open-drain DMOS output 3, rated 20 V with 100 mA continuous sink current and 250 mA current limit.
7 CLR input Active-low shift register clear: the input shift register is cleared when low, and data transfers to the storage register when high.
8 G input Active-low output enable: when high all output buffer data is held low and the drains are off, and when low the storage register data is transparent to the output buffer.
9 SER OUT output Serial output of the shift register that changes on the rising edge of SRCK, used for cascading to additional devices.
10 RCK input Register clock that transfers data from the shift register to the storage register.
11 DRAIN4 passive Open-drain DMOS output 4, rated 20 V with 100 mA continuous sink current and 250 mA current limit.
12 DRAIN5 passive Open-drain DMOS output 5, rated 20 V with 100 mA continuous sink current and 250 mA current limit.
13 DRAIN6 passive Open-drain DMOS output 6, rated 20 V with 100 mA continuous sink current and 250 mA current limit.
14 DRAIN7 passive Open-drain DMOS output 7, rated 20 V with 100 mA continuous sink current and 250 mA current limit.
15 SRCK input Shift register clock that shifts data in on the rising edge, with a minimum pulse duration of 40 ns.
16 GND power_in Ground reference; each power DMOS source is internally connected to GND.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SO-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: STPIC6D595MTR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SO-16 (KiCad packages3D, STEP)
  • 3D model files: stpic6d595mtr-etched.step / stpic6d595mtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stpic6d595mtr.step / stpic6d595mtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (21 pp, sha256 188a3dfa7eff0232, retrieved 2026-10-03, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF