main
Ray stpic6c595mtr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 0bf18b6
{
  "schema_version": 1,
  "type": "component",
  "slug": "stpic6c595mtr",
  "title": "STPIC6C595MTR",
  "brief": "STMicroelectronics Shifting Register, SO-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "stpic6c595mtr"
  ],
  "component": {
    "mpn": "STPIC6C595MTR",
    "manufacturer": "STMicroelectronics",
    "package": "SO-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Shifting Register",
    "datasheet": "https://www.st.com/resource/en/datasheet/stpic6c595mtr.pdf",
    "parts": {
      "symbol": "stpic6c595mtr.kicad_sym",
      "footprint": "stpic6c595mtr.kicad_mod",
      "model_3d": "stpic6c595mtr-etched.glb",
      "model_3d_plain": "stpic6c595mtr.glb",
      "model_3d_step": "stpic6c595mtr-etched.step",
      "model_3d_step_plain": "stpic6c595mtr.step",
      "lbr": "stpic6c595mtr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2802517"
    },
    "pins": [
      {
        "number": "1",
        "name": "VCC",
        "type": "power_in",
        "description": "Logic supply voltage. Recommended 4.5 V to 5.5 V (absolute max 7 V)."
      },
      {
        "number": "2",
        "name": "SER IN",
        "type": "input",
        "description": "Serial data input to the 8-bit shift register. Sampled on the rising edge of SRCK. Setup time 1.6 ns min / 3 ns typ before SRCK rising edge."
      },
      {
        "number": "3",
        "name": "DRAIN0",
        "type": "output",
        "description": "Open-drain DMOS output 0. Sinks up to 100 mA continuous / 250 mA peak with a 33 V clamp. Off when the corresponding storage-register bit is low or when /G is high."
      },
      {
        "number": "4",
        "name": "DRAIN1",
        "type": "output",
        "description": "Open-drain DMOS output 1. Sinks up to 100 mA continuous / 250 mA peak with a 33 V clamp."
      },
      {
        "number": "5",
        "name": "DRAIN2",
        "type": "output",
        "description": "Open-drain DMOS output 2. Sinks up to 100 mA continuous / 250 mA peak with a 33 V clamp."
      },
      {
        "number": "6",
        "name": "DRAIN3",
        "type": "output",
        "description": "Open-drain DMOS output 3. Sinks up to 100 mA continuous / 250 mA peak with a 33 V clamp."
      },
      {
        "number": "7",
        "name": "/CLR",
        "type": "input",
        "description": "Active-low shift-register clear. When low the input shift register is cleared; when high normal operation. Does not affect the storage register directly."
      },
      {
        "number": "8",
        "name": "/G",
        "type": "input",
        "description": "Active-low output enable. When high all DMOS drain outputs are forced off (data in output buffer held low); when low data from the storage register drives the outputs."
      },
      {
        "number": "9",
        "name": "SER OUT",
        "type": "output",
        "description": "Serial data output from the last stage of the shift register. Used to cascade multiple STPIC6C595 devices."
      },
      {
        "number": "10",
        "name": "RCK",
        "type": "input",
        "description": "Register (storage) clock. Rising edge transfers shift-register contents into the 8-bit D-type storage register whose outputs drive the DMOS buffers."
      },
      {
        "number": "11",
        "name": "DRAIN4",
        "type": "output",
        "description": "Open-drain DMOS output 4. Sinks up to 100 mA continuous / 250 mA peak with a 33 V clamp."
      },
      {
        "number": "12",
        "name": "DRAIN5",
        "type": "output",
        "description": "Open-drain DMOS output 5. Sinks up to 100 mA continuous / 250 mA peak with a 33 V clamp."
      },
      {
        "number": "13",
        "name": "DRAIN6",
        "type": "output",
        "description": "Open-drain DMOS output 6. Sinks up to 100 mA continuous / 250 mA peak with a 33 V clamp."
      },
      {
        "number": "14",
        "name": "DRAIN7",
        "type": "output",
        "description": "Open-drain DMOS output 7. Sinks up to 100 mA continuous / 250 mA peak with a 33 V clamp."
      },
      {
        "number": "15",
        "name": "SRCK",
        "type": "input",
        "description": "Shift-register clock. Rising edge clocks SER IN data into the shift register and shifts existing contents toward SER OUT."
      },
      {
        "number": "16",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for logic and DMOS source pins."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.st.com/resource/en/datasheet/stpic6c595mtr.pdf",
        "pages": 22,
        "sha256": "eeea45d02275800c",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -4.445
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
      "mark": "drawn"
    },
    "models_3d": [
      {
        "file": "stpic6c595mtr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          9.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "stpic6c595mtr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          9.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "d4038841944529910eb0d0afa0987bbae197104213cb34a2069697967f61eb5d",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "STMicroelectronics",
      "Package": "SO-16",
      "Category": "Logic",
      "Pins": "16"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "stpic6c595mtr"
  ],
  "discovery_pitch": "STPIC6C595MTR (STMicroelectronics) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "stpic6c595mtr.kicad_sym",
    "stpic6c595mtr.kicad_mod",
    "stpic6c595mtr.glb",
    "stpic6c595mtr.step",
    "stpic6c595mtr-etched.step",
    "stpic6c595mtr.lbr",
    "docs/hero.png",
    "docs/stpic6c595mtr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "STPIC6C595MTR",
      "kind": "packaging"
    },
    {
      "mpn": "STPIC6C595MTRTTR",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T09:06:12.372Z"
}