# STP4925A

**UMW** · MOSFETs · SOP-8

STP4925A from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source terminal of MOSFET 1; the datasheet rates the source current (diode conduction) IS at -2.3 A and VDSS at -30 V. |
| 2 | G1 | input | Gate terminal of MOSFET 1; gate-source voltage VGSS is limited to ±20 V. |
| 3 | S2 | passive | Source terminal of MOSFET 2; the datasheet rates the source current (diode conduction) IS at -2.3 A and VDSS at -30 V. |
| 4 | G2 | input | Gate terminal of MOSFET 2; gate-source voltage VGSS is limited to ±20 V. |
| 5 | D1 | passive | Drain terminal of one of the two MOSFETs; drain-source voltage VDSS is -30 V and continuous drain current ID is -7.2 A at TA=25°C. |
| 6 | D1 | passive | Drain terminal of one of the two MOSFETs; drain-source voltage VDSS is -30 V and continuous drain current ID is -7.2 A at TA=25°C. |
| 7 | D2 | passive | Drain terminal of one of the two MOSFETs; drain-source voltage VDSS is -30 V and continuous drain current ID is -7.2 A at TA=25°C. |
| 8 | D2 | passive | Drain terminal of one of the two MOSFETs; drain-source voltage VDSS is -30 V and continuous drain current ID is -7.2 A at TA=25°C. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate Threshold Voltage | VGS(th) | -1 |  | -3 | V | VDS=VGS, ID=-250µA | 2 |
| Gate-source leakage | IGSS | -100 |  | 100 | nA | VGS=±20V, VDS=0V | 2 |
| Zero gate voltage drain current | IDSS |  |  | -1 | µA | VDS=-30V, VGS=0V | 2 |
| Zero gate voltage drain current (TJ=55°C) | IDSS |  |  | -5 | µA | VDS=-30V, VGS=0V, TJ=55°C | 2 |
| Drain-source On Resistance | RDS(ON) |  |  | 25 | mΩ | VGS=-10V, ID=-7.2A | 2 |
| Drain-source On Resistance | RDS(ON) |  |  | 32 | mΩ | VGS=-4.5V, ID=-5.6A | 2 |
| Drain-source breakdown voltage | V(BR)DSS | -30 |  |  | V | VGS=0V, ID=-250µA | 2 |
| Diode Forward Voltage | VSD |  |  | -1 | V | IS=-2.3A, VGS=0V | 2 |
| Drain-Source Voltage | VDSS | -30 |  |  | V |  | 1 |
| Gate-Source Voltage | VGSS | -20 |  | 20 | V |  | 1 |
| Pulsed Drain Current | IDM | -50 |  |  | A |  | 1 |
| Continuous Source Current (Diode Conduction) | IS | -2.3 |  |  | A |  | 1 |
| Continuous Drain Current | ID | -7.2 |  |  | A | TA=25°C | 1 |
| Continuous Drain Current | ID | -5.6 |  |  | A | TA=70°C | 1 |
| Power Dissipation | PD |  |  | 2.8 | W | TA=25°C | 1 |
| Power Dissipation | PD |  |  | 1.8 | W | TA=70°C | 1 |
| Junction Temperature | TJ | -55 |  | 150 | °C |  | 1 |
| Storage Temperature Range | TSTG | -55 |  | 150 | °C |  | 1 |
| Thermal Resistance-Junction to Ambient | RθJA |  |  | 70 | °C/W |  | 1 |

## CAD (KiCad official)

- Symbol: `STP4925A`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `stp4925a-etched.step` / `stp4925a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stp4925a.step` / `stp4925a.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [UMW datasheet](docs/stp4925a-datasheet.pdf) (7 pp, sha256 `a325984b32a778f6`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stp4925a-datasheet.pdf)