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STP40NF10L

STMicroelectronics · MOSFETs · TO-220

STP40NF10L from STMicroelectronics, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; the gate-source voltage is limited to ±17 V absolute maximum, with a gate threshold of 1 V min to 2.5 V max at ID = 250 µA.
2 D passive Drain; drain-source voltage is rated 100 V maximum with 40 A continuous drain current at TC = 25°C.
3 S passive Source; carries up to 40 A continuous source-drain current through the body diode, with 160 A pulsed.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TO-220
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: STP40NF10L
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220 (KiCad packages3D, STEP)
  • 3D model files: stp40nf10l-etched.step / stp40nf10l-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stp40nf10l.step / stp40nf10l.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (12 pp, sha256 eeae6a120bccd6c6, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF