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STP40NF10

STMicroelectronics · MOSFETs · TO-220

STP40NF10 from STMicroelectronics, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Control input terminal rated ±20V maximum with gate threshold voltage of 2-4V at VDS=VGS and ID=250µA
2 Drain passive Main drain terminal rated 100V maximum for VDS and supporting continuous drain current of 50A at 25°C case temperature
3 Source passive Source terminal providing return path for drain current and including integrated source-drain diode with forward voltage of 1.5V at 50A

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TO-220
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: STP40NF10
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220 (KiCad packages3D, STEP)
  • 3D model files: stp40nf10-etched.step / stp40nf10-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stp40nf10.step / stp40nf10.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (12 pp, sha256 53b7412da93d969f, retrieved 2026-10-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF