component
STP28NM50N
Public Made by Adomby adom
STMicroelectronics MOSFETs, TO-220. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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STP28NM50N
STMicroelectronics · MOSFETs · TO-220
STP28NM50N from STMicroelectronics, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal of the N-channel MOSFET; gate-source voltage is rated at ±25 V (VGS). |
| 2 | D | passive | Drain terminal, also brought out on the TAB; continuous drain current is 21 A at TC = 25 °C with a 500 V drain-source voltage (VDS). |
| 3 | S | passive | Source terminal, the reference for the gate-source rating of ±25 V (VGS). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TO-220 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source voltage | VDS | 500 | V | 2 | |||
| Gate-source voltage | VGS | -25 | 25 | V | 2 | ||
| Drain current (continuous) at TC = 25 °C | ID | 21 | A | TC = 25 °C | 2 | ||
| Drain current (continuous) at TC = 100 °C | ID | 13 | A | TC = 100 °C | 2 | ||
| Drain current (pulsed) | IDM | 84 | A | Pulse width limited by safe operating area | 2 | ||
| Total power dissipation | PTOT | 150 | W | TC = 25 °C | 2 | ||
| Peak diode recovery voltage slope | dv/dt | 15 | V/ns | ISD ≤ 21 A, di/dt ≤ 400 A/μs, VDD = 400 V | 2 | ||
| Storage temperature range | Tstg | -55 | 150 | °C | 2 | ||
| Maximum operating junction temperature | TJ | 150 | °C | 2 | |||
| Thermal resistance, junction-to-case | RthJC | 0.83 | °C/W | TO-220 | 2 | ||
| Thermal resistance, junction-to-ambient | RthJA | 50 | °C/W | TO-220 | 2 | ||
| Avalanche current, repetitive or not-repetitive | IAR | 7.5 | A | Pulse width limited by TJ max. | 2 | ||
| Single pulse avalanche energy | EAS | 300 | mJ | Starting TJ = 25 °C, ID = IAR, VDD = 50 V | 2 | ||
| Drain-source breakdown voltage | V(BR)DSS | 500 | V | ID = 1 mA, VGS = 0 V | 3 | ||
| Zero gate voltage drain current | IDSS | 1 | µA | VGS = 0 V, VDS = 500 V | 3 | ||
| Zero gate voltage drain current at TC = 125 °C | IDSS | 100 | µA | VGS = 0 V, VDS = 500 V, TC = 125 °C (specified by design, not tested in production) | 3 | ||
| Gate body leakage current | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ±25 V | 3 | |
| Gate threshold voltage | VGS(th) | 2 | 3 | 4 | V | VDS = VGS, ID = 250 µA | 3 |
| Static drain-source on-resistance | RDS(on) | 135 | 158 | mΩ | VGS = 10 V, ID = 10.5 A | 3 | |
| Source-drain current | ISD | 21 | A | 4 | |||
| Source-drain current (pulsed) | ISDM | 84 | A | Pulse width limited by safe operating area | 4 | ||
| Forward on voltage | VSD | 1.5 | V | ISD = 21 A, VGS = 0 V; pulsed: pulse duration = 300 μs, duty cycle 1.5% | 4 |
CAD (KiCad official)
- Symbol:
STP28NM50N - Footprint:
Package_TO_SOT_THT:TO-220-3_Vertical - 3D model: TO-220 (KiCad packages3D, STEP)
- 3D model files:
stp28nm50n-etched.step/stp28nm50n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stp28nm50n.step/stp28nm50n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (22 pp, sha256
4dec8558901dd3c4, retrieved 2026-11-06, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STP28NM50N
**STMicroelectronics** · MOSFETs · TO-220
STP28NM50N from STMicroelectronics, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal of the N-channel MOSFET; gate-source voltage is rated at ±25 V (VGS). |
| 2 | D | passive | Drain terminal, also brought out on the TAB; continuous drain current is 21 A at TC = 25 °C with a 500 V drain-source voltage (VDS). |
| 3 | S | passive | Source terminal, the reference for the gate-source rating of ±25 V (VGS). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TO-220 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source voltage | VDS | | | 500 | V | | 2 |
| Gate-source voltage | VGS | -25 | | 25 | V | | 2 |
| Drain current (continuous) at TC = 25 °C | ID | | | 21 | A | TC = 25 °C | 2 |
| Drain current (continuous) at TC = 100 °C | ID | | | 13 | A | TC = 100 °C | 2 |
| Drain current (pulsed) | IDM | | | 84 | A | Pulse width limited by safe operating area | 2 |
| Total power dissipation | PTOT | | | 150 | W | TC = 25 °C | 2 |
| Peak diode recovery voltage slope | dv/dt | | | 15 | V/ns | ISD ≤ 21 A, di/dt ≤ 400 A/μs, VDD = 400 V | 2 |
| Storage temperature range | Tstg | -55 | | 150 | °C | | 2 |
| Maximum operating junction temperature | TJ | | | 150 | °C | | 2 |
| Thermal resistance, junction-to-case | RthJC | | | 0.83 | °C/W | TO-220 | 2 |
| Thermal resistance, junction-to-ambient | RthJA | | | 50 | °C/W | TO-220 | 2 |
| Avalanche current, repetitive or not-repetitive | IAR | | | 7.5 | A | Pulse width limited by TJ max. | 2 |
| Single pulse avalanche energy | EAS | | | 300 | mJ | Starting TJ = 25 °C, ID = IAR, VDD = 50 V | 2 |
| Drain-source breakdown voltage | V(BR)DSS | 500 | | | V | ID = 1 mA, VGS = 0 V | 3 |
| Zero gate voltage drain current | IDSS | | | 1 | µA | VGS = 0 V, VDS = 500 V | 3 |
| Zero gate voltage drain current at TC = 125 °C | IDSS | | | 100 | µA | VGS = 0 V, VDS = 500 V, TC = 125 °C (specified by design, not tested in production) | 3 |
| Gate body leakage current | IGSS | -100 | | 100 | nA | VDS = 0 V, VGS = ±25 V | 3 |
| Gate threshold voltage | VGS(th) | 2 | 3 | 4 | V | VDS = VGS, ID = 250 µA | 3 |
| Static drain-source on-resistance | RDS(on) | | 135 | 158 | mΩ | VGS = 10 V, ID = 10.5 A | 3 |
| Source-drain current | ISD | | | 21 | A | | 4 |
| Source-drain current (pulsed) | ISDM | | | 84 | A | Pulse width limited by safe operating area | 4 |
| Forward on voltage | VSD | | | 1.5 | V | ISD = 21 A, VGS = 0 V; pulsed: pulse duration = 300 μs, duty cycle 1.5% | 4 |
## CAD (KiCad official)
- Symbol: `STP28NM50N`
- Footprint: `Package_TO_SOT_THT:TO-220-3_Vertical`
- 3D model: TO-220 (KiCad packages3D, STEP)
- 3D model files: `stp28nm50n-etched.step` / `stp28nm50n-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stp28nm50n.step` / `stp28nm50n.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/stp28nm50n.pdf) (22 pp, sha256 `4dec8558901dd3c4`, retrieved 2026-11-06, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/stp28nm50n-datasheet.pdf)