# STP24N60DM2

**STMicroelectronics** · MOSFETs · TO-220

STP24N60DM2 from STMicroelectronics, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate of the MOSFET; gate-source voltage is rated at ±25 V (VGS) per Table 1. |
| 2 | D | passive | Drain of the MOSFET, rated 600 V drain-source voltage (VDS) with continuous drain current of 18 A at TC = 25 °C; the drain is also connected to the mounting tab. |
| 3 | S | passive | Source of the MOSFET; source-drain diode continuous current is rated 18 A with pulsed current of 72 A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TO-220 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source breakdown voltage | V(BR)DSS | 600 |  |  | V | VGS = 0 V, ID = 1 mA | 3 |
| Zero gate voltage drain current | IDSS |  |  | 1.5 | µA | VGS = 0 V, VDS = 600 V | 3 |
| Zero gate voltage drain current at TC = 125 °C | IDSS |  |  | 100 | µA | VGS = 0 V, VDS = 600 V, TC = 125 °C (specified by design, not tested in production) | 3 |
| Gate-body leakage current | IGSS | -10 |  | 10 | µA | VDS = 0 V, VGS = ±25 V | 3 |
| Gate threshold voltage | VGS(th) | 3 | 4 | 5 | V | VDS = VGS, ID = 250 µA | 3 |
| Static drain-source on-resistance | RDS(on) |  | 175 | 200 | mΩ | VGS = 10 V, ID = 9 A | 3 |
| Source-drain current | ISD |  |  | 18 | A |  | 4 |
| Source-drain current (pulsed) | ISDM |  |  | 72 | A |  | 4 |
| Forward on voltage | VSD |  |  | 1.6 | V | ISD = 18 A, VGS = 0 V | 4 |
| Drain-source voltage | VDS |  |  | 600 | V |  | 2 |
| Gate-source voltage | VGS | -25 |  | 25 | V |  | 2 |
| Drain current (continuous) | ID |  |  | 18 | A | TC = 25 °C | 2 |
| Drain current (continuous) | ID |  |  | 11 | A | TC = 100 °C | 2 |
| Drain current (pulsed) | IDM |  |  | 72 | A | Pulse width limited by safe operating area | 2 |
| Total power dissipation | PTOT |  |  | 150 | W | TC = 25 °C | 2 |
| Peak diode recovery voltage slope | dv/dt(2) |  |  | 40 | V/ns | ISD ≤ 18 A, di/dt ≤ 400 A/µs, VDS (peak) < V(BR)DSS, VDD = 400 V | 2 |
| MOSFET dv/dt ruggedness | dv/dt(3) |  |  | 50 | V/ns | VDS ≤ 480 V | 2 |
| Storage temperature range | Tstg | -55 |  | 150 | °C |  | 2 |
| Avalanche current, repetitive or not-repetitive | IAR |  |  | 3.5 | A | Pulse width limited by TJ max. | 2 |
| Single pulse avalanche energy | EAS |  |  | 180 | mJ | Starting TJ = 25 °C, ID = IAR, VDD = 50 V | 2 |
| Thermal resistance, junction-to-case | RthJC |  | 0.83 |  | °C/W | Junction-to-case | 2 |
| Thermal resistance, junction-to-ambient (TO-220) | RthJA |  | 62.5 |  | °C/W | Junction-to-ambient, TO-220 column | 2 |

## CAD (KiCad official)

- Symbol: `STP24N60DM2`
- Footprint: `Package_TO_SOT_THT:TO-220-3_Vertical`
- 3D model: TO-220 (KiCad packages3D, STEP)
- 3D model files: `stp24n60dm2-etched.step` / `stp24n60dm2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stp24n60dm2.step` / `stp24n60dm2.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/stp24n60dm2.pdf) (20 pp, sha256 `cf5f2390b126f747`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stp24n60dm2-datasheet.pdf)