# STP200N3LL

**STMicroelectronics** · MOSFETs · TO-220-3

STP200N3LL from STMicroelectronics, in a TO-220-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal; gate-source voltage is rated at ±20 V per the absolute maximum ratings. |
| 2 | D | passive | Drain terminal, electrically connected to the TAB; drain-source voltage is rated at 30 V with continuous drain current limited by the package to 120 A. |
| 3 | S | passive | Source terminal; drain-source breakdown voltage V(BR)DSS is specified as 30 V minimum at VGS = 0 V and ID = 1 mA. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TO-220-3 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source voltage | VDS |  |  | 30 | V |  | 3 |
| Gate-source voltage | VGS | -20 |  | 20 | V |  | 3 |
| Drain current (continuous), silicon limited | ID |  |  | 200 | A | Tcase = 25 °C | 3 |
| Drain current (continuous), package limited | ID |  |  | 120 | A | Tcase = 25 °C | 3 |
| Drain current (continuous) | ID |  |  | 120 | A | Tcase = 100 °C | 3 |
| Drain current (pulsed) | IDM |  |  | 480 | A | Pulse width is limited by safe operating area | 3 |
| Total dissipation | PTOT |  |  | 176.5 | W | Tcase = 25 °C | 3 |
| Single pulse avalanche energy | EAS |  |  | 300 | mJ | starting Tj = 25 °C, ID = 68 A | 3 |
| Storage temperature range | Tstg | -55 |  | 175 | °C |  | 3 |
| Thermal resistance junction-case | Rthj-case |  |  | 0.85 | °C/W |  | 3 |
| Thermal resistance junction-ambient | Rthj-amb |  |  | 62.5 | °C/W |  | 3 |
| Drain-source breakdown voltage | V(BR)DSS | 30 |  |  | V | VGS = 0 V, ID = 1 mA | 4 |
| Zero gate voltage drain current | IDSS |  |  | 1 | µA | VGS = 0 V, VDS = 30 V | 4 |
| Zero gate voltage drain current at 125 °C | IDSS |  |  | 10 | µA | VGS = 0 V, VDS = 30 V, Tcase = 125 °C(1) | 4 |
| Gate-body leakage current | IGSS | -100 |  | 100 | nA | VDS = 0 V, VGS = ±20 V | 4 |
| Gate threshold voltage | VGS(th) | 1 |  | 2.5 | V | VDS = VGS, ID = 250 µA | 4 |
| Static drain-source on-resistance | RDS(on) |  | 2.15 | 2.4 | mΩ | VGS = 10 V, ID = 60 A | 4 |
| Static drain-source on-resistance | RDS(on) |  | 2.5 | 3.1 | mΩ | VGS = 4.5 V, ID = 60 A | 4 |

## CAD (KiCad official)

- Symbol: `STP200N3LL`
- Footprint: `Package_TO_SOT_THT:TO-220-3_Vertical`
- 3D model: TO-220-3 (KiCad packages3D, STEP)
- 3D model files: `stp200n3ll-etched.step` / `stp200n3ll-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stp200n3ll.step` / `stp200n3ll.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/stp200n3ll.pdf) (13 pp, sha256 `da3c55c2a1a055c0`, retrieved 2026-11-06, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stp200n3ll-datasheet.pdf)