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STOTG04ESQTR

STMicroelectronics · USB Converters · QFN-24-EP(4x4)

STOTG04ESQTR from STMicroelectronics, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ADR_PSW bidirectional Least significant bit of the I2C address, latched on reset, and PSW output enabling or disabling an external charge pump.
2 SDA bidirectional I2C serial data line, an input and open-drain output.
3 SCL input I2C serial clock input.
4 RESET/ input Active low logic reset input.
5 INT/ output Active low interrupt signal output, open-drain.
6 SPEED input Selects transceiver mode (0 = low-speed, 1 = full-speed), an input with internal pull-up resistor.
7 VTRM power_out Internal voltage regulator output; an external 1µF decoupling capacitor should be connected, and the regulator can be bypassed by tying this pin to VBAT when VBAT is 2.7V to 3.6V.
8 SUSPEND input Power-down input (0 = active mode, 1 = power-down mode).
9 OE_TP_INT/ bidirectional Output enable of the differential driver in USB mode, or interrupt output.
10 VM output D- single-ended receiver output.
11 VP output D+ single-ended receiver output.
12 RCV output Differential receiver output.
13 SE0_VM bidirectional Single-ended zero input/output in DAT_SE0 transmit mode, negative data input/output in single-ended transmit mode, or TXD in UART mode.
14 DAT_VP bidirectional Data input/output in DAT_SE0 transmit mode, positive data input/output in single-ended transmit mode, or RXD in UART mode.
15 D- bidirectional Negative data line in USB mode, or serial data output in UART mode.
16 D+ bidirectional Positive data line in USB mode, or serial data input in UART mode.
17 GND power_in Common analog and digital ground.
18 ID bidirectional ID pin of the USB connector used for protocol identification.
19 VBUS power_in VBUS line of the USB interface, which needs an external 4.7µF capacitor.
20 VBAT power_in Analog power supply voltage, +2.7V to +5.5V.
21 CAP1 bidirectional External capacitor pin for the charge pump, with a 220nF capacitor between CAP1 and CAP2.
22 CAP2 bidirectional External capacitor pin for the charge pump, with a 220nF capacitor between CAP1 and CAP2.
23 CGND power_in Ground for the charge pump.
24 VIF power_in Logic power supply, +1.6V to 3.6V.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package QFN-24-EP(4x4)
Category Interface
Pins 25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Logic Supply Voltage VIF -0.5 4.5 V 5
Analog Supply Voltage VBAT -0.5 6.5 V 5
DC Input Voltage on any logic interface pin VDCDIG -0.5 4.5 V 5
Storage Temperature Range TSTG -65 150 °C 5
Electrostatic discharge voltage on USB pins VESD -8 8 kV Human Body Model 5
Electrostatic discharge voltage on USB pins VESD -6 6 kV Contact discharge (*) IEC-61000-4-2 level 3 5
Logic Supply Voltage VIF 1.6 1.8 3.6 V 5
Analog Supply Voltage VBAT 2.7 3.3 5.5 V 5
Operating Temperature Range TA -40 85 °C 5
Charge pump external capacitor CEXT 100 220 470 nF 5
Charge pump tank capacitor CT 1 4.7 6.5 µF 5
Digital Part Supply Current IIF 0.6 1.6 mA Active mode 6
Digital Part Supply Current IIF 1 µA Power down mode 6
Operating Supply Current IBAT 4.5 7 mA Transceiver current while transmitting and receiving (1,2) 6
Operating Supply Current IBAT 17 25 mA Charge pump current, ILOAD = 8mA 6
Operating Supply Current IBAT 1 µA Power down mode (3) 6
LOW level output voltage VOL 0.15 V IOL = 100µA 6
LOW level output voltage VOL 0.4 V IOL = 2mA 6
Input leakage current ILKG -1 1 µA 6
Off-state output current IOZ -5 5 µA 6
VBUS output voltage VBUS 4.4 4.9 5.25 V ILOAD = 8mA 6
VBUS leakage voltage VBUS_LKG 3 200 mV No Load 6
VBUS output ripple VBUS_RIP 30 60 mV ILOAD = 8mA, CT = 4.7µF 6
Charge-pump switching frequency fCP 0.5 0.8 1.5 MHz (2) 6
VBUS input impedance RVBUS 40 76 100 kΩ 6
Maximum VBUS source current IVBUS 20 35 mA CEXT = 220 nF, VBUS > 4.4V 6
VBUS valid comparator threshold VBUS_VLD 4.4 V Low to high transition 6
Session valid comparator threshold for both A and B devices VSES_VLD 0.8 2 V Low to high transition 6
VBUS charge pull-up resistance RVBUS_PU 281 640 Ω 6
VBUS discharge pull-down resistance RVBUS_PD 656 1260 Ω 6
ID pin bias voltage VID_BIAS 1.3 1.9 3 V RCP_ID = 140kΩ, VBAT ≤ 5V 6
ID pin pull-up resistance RID_PU 70 105 130 kΩ 6
ID line short resistance to detect id_gnd state RID_GND 10 Ω 6
ID line short resistance to detect id_float state RID_FLOAT 800 kΩ 6
Output Impedance ZDRV 8 16 24 Ω Excluding external RS 7
HIGH level output voltage VOH_DRV 2.8 3.6 V RLH = 14.25kΩ, VTRM = 3.3V 7
HIGH level output voltage VOH_DRV 2.6 3 V RLH = 14.25kΩ, VTRM = 2.7V 7
LOW level output voltage VOL_DRV 0 0.3 V RLL = 1.425kΩ 7
Driver crossover voltage VCRS 1.3 1.67 2 V CLOAD = 50 to 600pF 7
Differential receiver input sensitivity (VD+ - VD-) VDI -200 200 mV VCM = 0.8 to 2.5V 7
SE receivers switching threshold VSE-TH 0.8 1.6 2 V Low to high transition 7
SE receivers switching threshold VSE-TH 0.8 1.1 2 V High to low transition 7
Input capacitance CIN 10 30 pF 7
Data line pull-up resistance on pin D+ RPU_D+ 900 1300 1575 Ω Bus Idle 7
Data line pull-up resistance on pin D+ RPU_D+ 1425 2200 3090 Ω Receiving mode 7
Data line pull-up resistance on pin D- RPU_D- 900 1300 1575 Ω 7
Data line pull-down resistance RPD 14.25 17 24.8 kΩ 7
Data line leakage voltage VDT_LKG 200 342 mV RPU_EXT = 300kΩ 7
Car kit Interrupt threshold VCR_INT_TH 0.4 0.6 V 7
HIGH level output voltage (UART D+ and D-) VOH 2.4 3.6 V IOH= -2mA 7
LOW level output voltage (UART D+ and D-) VOL 0 0.4 V IOL = 2mA 7
HIGH level input voltage (UART D+ and D-) VIH 2 V 7
LOW level input voltage (UART D+ and D-) VIL 0.8 V 7
Internal power supply voltage VTRM 3 3.3 3.6 V VBAT = 3.3 to 5V, no load; uart_en=0 7
Internal power supply voltage VTRM 2.6 2.75 2.9 V VBAT = 2.8 to 5V, no load; uart_en=1 7
Voltage regulator output current ITRM 20 mA VBAT = 3.6V, VTRM > 3V; uart_en=0 7
Voltage regulator output current ITRM 10 mA VBAT = 3.0V, VTRM >2.6V; uart_en=1 7
Thermal Resistance Junction-Ambient RthJA 59 °C/W 5

CAD (KiCad official)

  • Symbol: STOTG04ESQTR
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: stotg04esqtr-etched.step / stotg04esqtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stotg04esqtr.step / stotg04esqtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (26 pp, sha256 4d566ca1cf10b934, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF