component
STN4488L
Public Made by Adomby adom
STANSON Tech MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 17d ago |
| viewers | 17d ago |
| package.json | 17d ago |
| page.json | 17d ago |
| README.md | 17d ago |
| stn4488l-etched.glb | 17d ago |
| stn4488l-etched.step | 17d ago |
| stn4488l-hero.glb | 17d ago |
| stn4488l-hero.overlay.json | 17d ago |
| stn4488l.glb | 17d ago |
| stn4488l.kicad_mod | 17d ago |
| stn4488l.kicad_sym | 17d ago |
| stn4488l.lbr | 17d ago |
| stn4488l.step | 17d ago |
STN4488L
STANSON Tech · MOSFETs · SOP-8
STN4488L from STANSON Tech, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the N-channel MOSFET, tied internally with pins 2 and 3. |
| 2 | S | passive | Source terminal of the N-channel MOSFET, tied internally with pins 1 and 3. |
| 3 | S | passive | Source terminal of the N-channel MOSFET, tied internally with pins 1 and 2. |
| 4 | G | input | Gate terminal; VGSS rating is ±20 V and the gate threshold voltage VGS(th) is 1.0 V min to 2.5 V max at ID=250 uA. |
| 5 | D | passive | Drain terminal, tied internally with pins 6, 7 and 8; VDSS is 30 V. |
| 6 | D | passive | Drain terminal, tied internally with pins 5, 7 and 8; VDSS is 30 V. |
| 7 | D | passive | Drain terminal, tied internally with pins 5, 6 and 8; VDSS is 30 V. |
| 8 | D | passive | Drain terminal, tied internally with pins 5, 6 and 7; VDSS is 30 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STANSON Tech |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | 30 | V | 2 | |||
| Gate-Source Voltage | VGSS | -20 | 20 | V | 2 | ||
| Continuous Drain Current | ID | 20 | A | TJ=150℃, TA=25℃, 10 sec | 2 | ||
| Continuous Drain Current | ID | 17 | A | TJ=150℃, TA=70℃, 10 sec | 2 | ||
| Continuous Drain Current | ID | 15 | A | TJ=150℃, TA=25℃, steady state | 2 | ||
| Continuous Drain Current | ID | 12 | A | TJ=150℃, TA=70℃, steady state | 2 | ||
| Pulsed Drain Current | IDM | 80 | A | 2 | |||
| Continuous Source Current (Diode Conduction) | IS | 3 | A | 2 | |||
| Power Dissipation | PD | 3.1 | W | TA=25℃, 10 sec | 2 | ||
| Power Dissipation | PD | 1.7 | W | TA=25℃, steady state | 2 | ||
| Power Dissipation | PD | 20 | W | TA=70℃, 10 sec (printed as 20; probable 2.0, verify) | 2 | ||
| Power Dissipation | PD | 1.1 | W | TA=70℃, steady state | 2 | ||
| Operation Junction Temperature | TJ | -55 | 150 | ℃ | 2 | ||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 2 | ||
| Thermal Resistance Junction to Ambient | RθJA | 59 | 75 | ℃/W | 2 | ||
| Drain-Source Breakdown Voltage | V(BR)DSS | 30 | V | VGS=0V, ID=250uA | 3 | ||
| Gate Threshold Voltage | VGS(th) | 1 | 2.5 | V | VDS=VGS, ID=250uA | 3 | |
| Gate Leakage Current | IGSS | -10 | 10 | nA | VDS=0V, VGS=±20V | 3 | |
| Zero Gate Voltage Drain Current | IDSS | 1 | uA | VDS=30V, VGS=0V | 3 | ||
| Zero Gate Voltage Drain Current | IDSS | 5 | uA | VDS=30V, VGS=0V, TJ=55℃ | 3 | ||
| On-State Drain Current | ID(on) | 80 | A | VDS=5V, VGS=10V | 3 | ||
| Drain-source On-Resistance | RDS(on) | 3.8 | 4.6 | mΩ | VGS=10V, ID=20A | 3 | |
| Drain-source On-Resistance | RDS(on) | 5.3 | 6.5 | mΩ | VGS=10V, ID=20A, TJ=125°C | 3 | |
| Drain-source On-Resistance | RDS(on) | 5.2 | 6.4 | mΩ | VGS=4.5V, ID=18A | 3 | |
| Forward Transconductance | gfs | 72 | S | VDS=10V, ID=20A | 3 | ||
| Diode Forward Voltage | VSD | 1 | V | IS=8.0A, VGS=0V | 3 | ||
| Total Gate Charge | Qg | 84 | 112 | nC | VDS=15V, VGS=10V, ID=20A | 3 | |
| Gate-Source Charge | Qgs | 12 | nC | VDS=15V, VGS=10V, ID=20A | 3 | ||
| Gate-Drain Charge | Qgd | 21 | nC | VDS=15V, VGS=10V, ID=20A | 3 | ||
| Input Capacitance | Ciss | 5450 | 6800 | pF | VDS=15V, VGS=0V, f=1MHz | 3 | |
| Output Capacitance | Coss | 760 | pF | VDS=15V, VGS=0V, f=1MHz | 3 | ||
| Reverse Transfer Capacitance | Crss | 540 | pF | VDS=15V, VGS=0V, f=1MHz | 3 | ||
| Turn-On Delay Time | td(on) | 13 | nS | VDS=15V, RL=0.75Ω, ID=1A, VG=10V, RG=3.0Ω | 3 | ||
| Turn-On Rise Time | tr | 9.8 | nS | VDS=15V, RL=0.75Ω, ID=1A, VG=10V, RG=3.0Ω | 3 | ||
| Turn-Off Delay Time | td(off) | 49 | nS | VDS=15V, RL=0.75Ω, ID=1A, VG=10V, RG=3.0Ω | 3 | ||
| Turn-Off Fall Time | tf | 16 | nS | VDS=15V, RL=0.75Ω, ID=1A, VG=10V, RG=3.0Ω | 3 |
CAD (KiCad official)
- Symbol:
STN4488L - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
stn4488l-etched.step/stn4488l-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stn4488l.step/stn4488l.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STANSON Tech datasheet (7 pp, sha256
b4d6f89a5d2a410c, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).