component
STM8S208S6T6C
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+80@@ -0,0 +1,80 @@+# STM8S208S6T6C++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-44(10x10)++STM8S208S6T6C from STMicroelectronics, in a LQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | NRST | input | Reset input pin with Schmitt trigger and internal pull-up resistor 30-80 kΩ; VIL 0 to 0.3×VDD, VIH 0.7×VDD to VDD+0.3V. |+| 2 | PA1/OSCIN | input | Port A bit 1 / high-speed external oscillator input (1-24 MHz crystal or external clock); when used as oscillator input, requires load capacitance of 20 pF. |+| 3 | PA2/OSCOUT | output | Port A bit 2 / high-speed external oscillator output for crystal resonator feedback. |+| 4 | VSSIO_1 | power_in | I/O ground reference for LQFP44 package pins; must be connected to external VSS. |+| 5 | VSS | power_in | Digital ground reference; all VSS pins must be connected to external power supply ground. |+| 6 | VCAP | power_in | 1.8V internal regulator capacitor connection; use external capacitor CEXT 470-3300 nF with ESR ≤0.3Ω at 1 MHz and ESL ≤15nH. |+| 7 | VDD | power_in | Digital power supply 2.95-5.5V; all VDD pins must be connected to external power supply. |+| 8 | VDDIO_1 | power_in | I/O power supply 2.95-5.5V for LQFP44 package I/O pins. |+| 9 | PA4/UART1_RX | bidirectional | Port A bit 4 high sink output / UART1 receive input; high sink capability 4-20mA, output speed O3 (fast/slow programmable with slow default); can be used as analog input AIN4 or GPIO. |+| 10 | PA5/UART1_TX | bidirectional | Port A bit 5 high sink output / UART1 transmit output; high sink capability 4-20mA, output speed O3 (fast/slow programmable with slow default); can be used as analog input AIN5 or GPIO. |+| 11 | PA6/UART1_CK | bidirectional | Port A bit 6 high sink output / UART1 synchronous clock; high sink capability 4-20mA, output speed O3 (fast/slow programmable with slow default); can be used as GPIO. |+| 12 | VDDA | power_in | Analog power supply 3.0-5.5V for 10-bit ADC; must be connected to VDD through LC filter for low noise. |+| 13 | VSSA | power_in | Analog ground reference for 10-bit ADC; must be connected to VSS. |+| 14 | PB7/AIN7 | input | Port B bit 7 / 10-bit ADC analog input channel 7; input voltage range 0 to VDDA. |+| 15 | PB6/AIN6 | input | Port B bit 6 / 10-bit ADC analog input channel 6; input voltage range 0 to VDDA; internal sample/hold capacitance 3pF, sampling time 0.5-0.75 µs. |+| 16 | PB5/AIN5 | input | Port B bit 5 / 10-bit ADC analog input channel 5 with remapping option AFR6 to I2C_SDA; input voltage range 0 to VDDA. |+| 17 | PB4/AIN4 | input | Port B bit 4 / 10-bit ADC analog input channel 4 with remapping option AFR6 to I2C_SCL; input voltage range 0 to VDDA. |+| 18 | PB3/AIN3 | input | Port B bit 3 / 10-bit ADC analog input channel 3 with remapping option AFR5 to TIM1_ETR (external trigger). |+| 19 | PB2/AIN2 | input | Port B bit 2 / 10-bit ADC analog input channel 2 with remapping option AFR5 to TIM1_CH3N (inverted TIM1 channel 3 output). |+| 20 | PB1/AIN1 | input | Port B bit 1 / 10-bit ADC analog input channel 1 with remapping option AFR5 to TIM1_CH2N (inverted TIM1 channel 2 output). |+| 21 | PB0/AIN0 | input | Port B bit 0 / 10-bit ADC analog input channel 0 with remapping option AFR5 to TIM1_CH1N (inverted TIM1 channel 1 output). |+| 22 | PE6/AIN9 | input | Port E bit 6 / 10-bit ADC analog input channel 9; input voltage range 0 to VDDA. |+| 23 | PE5/SPI_NSS | bidirectional | Port E bit 5 / SPI master/slave select control pin; can be GPIO or SPI NSS signal. |+| 24 | PC1/TIM1_CH1 | bidirectional | Port C bit 1 high sink output / TIM1 capture/compare channel 1 or PWM output; high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default). |+| 25 | PC2/TIM1_CH2 | bidirectional | Port C bit 2 high sink output / TIM1 capture/compare channel 2 or PWM output; high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default). |+| 26 | PC3/TIM1_CH3 | bidirectional | Port C bit 3 high sink output / TIM1 capture/compare channel 3 or PWM output; high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default). |+| 27 | PC5/SPI_SCK | bidirectional | Port C bit 5 high sink output / SPI serial clock; high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default); maximum SPI clock frequency 10 MHz master mode. |+| 28 | VSSIO_2 | power_in | I/O ground reference for LQFP44 package pins on opposite side; must be connected to external VSS. |+| 29 | VDDIO_2 | power_in | I/O power supply 2.95-5.5V for LQFP44 package I/O pins on opposite side. |+| 30 | PC6/SPI_MOSI | output | Port C bit 6 high sink output / SPI master output slave input (MOSI); high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default); maximum SPI speed 10 MHz. |+| 31 | PC7/SPI_MISO | input | Port C bit 7 high sink output / SPI master input slave output (MISO); high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default); maximum SPI speed 6 MHz slave mode. |+| 32 | PG0/CAN_TX | output | Port G bit 0 / beCAN transmit output on STM8S208xx only (not available on STM8S207xx); beCAN maximum transmission speed 1 Mbit/s. |+| 33 | PG1/CAN_RX | input | Port G bit 1 / beCAN receive input on STM8S208xx only (not available on STM8S207xx); beCAN maximum transmission speed 1 Mbit/s. |+| 34 | PE2/I2C_SDA | tri_state | Port E bit 2 true open-drain output / I2C data line (SDA); no internal pull-up, no protection diode to VDD; I2C clock frequency up to 400 kHz. |+| 35 | PE1/I2C_SCL | tri_state | Port E bit 1 true open-drain output / I2C clock line (SCL); no internal pull-up, no protection diode to VDD; I2C clock frequency up to 400 kHz. |+| 36 | PE0/CLK_CCO | output | Port E bit 0 high sink output / configurable master clock output (CCO); high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default); selectable clock sources from internal oscillators or external input. |+| 37 | PD0/TIM3_CH2 | bidirectional | Port D bit 0 high sink output / TIM3 channel 2 output with remapping options AFR3 to TIM1_BKIN (break input) or AFR2 to CLK_CCO (clock output); output speed O3 (fast/slow programmable with slow default). |+| 38 | PD1/SWIM | bidirectional | Port D bit 1 high sink output / SWIM (Single Wire Interface Module) data pin for in-circuit debugging and programming; output speed O4 (fast/slow programmable with fast default); pulled up during reset. |+| 39 | PD2/TIM3_CH1 | bidirectional | Port D bit 2 high sink output / TIM3 channel 1 with remapping option AFR1 to TIM2_CH3 (channel 3 alternate); output speed O3 (fast/slow programmable with slow default). |+| 40 | PD3/TIM2_CH2 | bidirectional | Port D bit 3 high sink output / TIM2 channel 2 with remapping option AFR0 to ADC_ETR (ADC external trigger); output speed O3 (fast/slow programmable with slow default). |+| 41 | PD4/TIM2_CH1 | bidirectional | Port D bit 4 high sink output / TIM2 channel 1 with remapping option AFR7 to BEEP (beeper output 1/2/4 kHz); output speed O3 (fast/slow programmable with slow default). |+| 42 | PD5/UART3_TX | output | Port D bit 5 / UART3 asynchronous transmit data output; programmable baud rate up to 1 Mbit/s; output speed O1 (slow, up to 2 MHz). |+| 43 | PD6/UART3_RX | input | Port D bit 6 / UART3 asynchronous receive data input with ROM bootloader pull-up during boot; programmable baud rate up to 1 Mbit/s; supports LIN 2.1 slave mode with automatic resynchronization. |+| 44 | PD7/TLI | input | Port D bit 7 / top-level external interrupt input with remapping option AFR4 (44-pin package only) to TIM1_CH4 (TIM1 channel 4 output); output speed O1 (slow, up to 2 MHz). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-44(10x10) |+| Category | Embedded Processors & Controllers |+| Pins | 44 |++## CAD (KiCad official)++- Symbol: `STM8S208S6T6C`+- Footprint: `Package_QFP:LQFP-44_10x10mm_P0.8mm`+- 3D model: LQFP-44(10x10) (KiCad packages3D, STEP)+- 3D model files: `stm8s208s6t6c-etched.step` / `stm8s208s6t6c-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm8s208s6t6c.step` / `stm8s208s6t6c.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590902926975967232) (117 pp, sha256 `7adeaa849cf9e22f`, retrieved 2026-09-27, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm8s208s6t6c-datasheet.pdf)
page.jsonadded+374@@ -0,0 +1,374 @@+{+ "slug": "stm8s208s6t6c",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm8s208s6t6c",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm8s208s6t6c.kicad_sym",+ "stm8s208s6t6c.kicad_mod",+ "stm8s208s6t6c.glb",+ "stm8s208s6t6c.step",+ "stm8s208s6t6c.lbr",+ "docs/hero.png",+ "docs/stm8s208s6t6c-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "STM8S208S6T6C",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-44(10x10)",+ "pin_count": 44,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590902926975967232",+ "parts": {+ "symbol": "stm8s208s6t6c.kicad_sym",+ "footprint": "stm8s208s6t6c.kicad_mod",+ "model_3d": "stm8s208s6t6c-etched.glb",+ "model_3d_plain": "stm8s208s6t6c.glb",+ "model_3d_step": "stm8s208s6t6c-etched.step",+ "model_3d_step_plain": "stm8s208s6t6c.step",+ "lbr": "stm8s208s6t6c.lbr"+ },+ "distributor_links": {+ "lcsc": "C2969778",+ "digikey": "497-11595-ND",+ "mouser": "511-STM8S208S6T6C"+ },+ "distributor_check": {+ "checked_at": "2026-09-27T06:49:22Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-11595-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-STM8S208S6T6C",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "NRST",+ "type": "input",+ "description": "Reset input pin with Schmitt trigger and internal pull-up resistor 30-80 kΩ; VIL 0 to 0.3×VDD, VIH 0.7×VDD to VDD+0.3V."+ },+ {+ "number": "2",+ "name": "PA1/OSCIN",+ "type": "input",+ "description": "Port A bit 1 / high-speed external oscillator input (1-24 MHz crystal or external clock); when used as oscillator input, requires load capacitance of 20 pF."+ },+ {+ "number": "3",+ "name": "PA2/OSCOUT",+ "type": "output",+ "description": "Port A bit 2 / high-speed external oscillator output for crystal resonator feedback."+ },+ {+ "number": "4",+ "name": "VSSIO_1",+ "type": "power_in",+ "description": "I/O ground reference for LQFP44 package pins; must be connected to external VSS."+ },+ {+ "number": "5",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground reference; all VSS pins must be connected to external power supply ground."+ },+ {+ "number": "6",+ "name": "VCAP",+ "type": "power_in",+ "description": "1.8V internal regulator capacitor connection; use external capacitor CEXT 470-3300 nF with ESR ≤0.3Ω at 1 MHz and ESL ≤15nH."+ },+ {+ "number": "7",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital power supply 2.95-5.5V; all VDD pins must be connected to external power supply."+ },+ {+ "number": "8",+ "name": "VDDIO_1",+ "type": "power_in",+ "description": "I/O power supply 2.95-5.5V for LQFP44 package I/O pins."+ },+ {+ "number": "9",+ "name": "PA4/UART1_RX",+ "type": "bidirectional",+ "description": "Port A bit 4 high sink output / UART1 receive input; high sink capability 4-20mA, output speed O3 (fast/slow programmable with slow default); can be used as analog input AIN4 or GPIO."+ },+ {+ "number": "10",+ "name": "PA5/UART1_TX",+ "type": "bidirectional",+ "description": "Port A bit 5 high sink output / UART1 transmit output; high sink capability 4-20mA, output speed O3 (fast/slow programmable with slow default); can be used as analog input AIN5 or GPIO."+ },+ {+ "number": "11",+ "name": "PA6/UART1_CK",+ "type": "bidirectional",+ "description": "Port A bit 6 high sink output / UART1 synchronous clock; high sink capability 4-20mA, output speed O3 (fast/slow programmable with slow default); can be used as GPIO."+ },+ {+ "number": "12",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog power supply 3.0-5.5V for 10-bit ADC; must be connected to VDD through LC filter for low noise."+ },+ {+ "number": "13",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground reference for 10-bit ADC; must be connected to VSS."+ },+ {+ "number": "14",+ "name": "PB7/AIN7",+ "type": "input",+ "description": "Port B bit 7 / 10-bit ADC analog input channel 7; input voltage range 0 to VDDA."+ },+ {+ "number": "15",+ "name": "PB6/AIN6",+ "type": "input",+ "description": "Port B bit 6 / 10-bit ADC analog input channel 6; input voltage range 0 to VDDA; internal sample/hold capacitance 3pF, sampling time 0.5-0.75 µs."+ },+ {+ "number": "16",+ "name": "PB5/AIN5",+ "type": "input",+ "description": "Port B bit 5 / 10-bit ADC analog input channel 5 with remapping option AFR6 to I2C_SDA; input voltage range 0 to VDDA."+ },+ {+ "number": "17",+ "name": "PB4/AIN4",+ "type": "input",+ "description": "Port B bit 4 / 10-bit ADC analog input channel 4 with remapping option AFR6 to I2C_SCL; input voltage range 0 to VDDA."+ },+ {+ "number": "18",+ "name": "PB3/AIN3",+ "type": "input",+ "description": "Port B bit 3 / 10-bit ADC analog input channel 3 with remapping option AFR5 to TIM1_ETR (external trigger)."+ },+ {+ "number": "19",+ "name": "PB2/AIN2",+ "type": "input",+ "description": "Port B bit 2 / 10-bit ADC analog input channel 2 with remapping option AFR5 to TIM1_CH3N (inverted TIM1 channel 3 output)."+ },+ {+ "number": "20",+ "name": "PB1/AIN1",+ "type": "input",+ "description": "Port B bit 1 / 10-bit ADC analog input channel 1 with remapping option AFR5 to TIM1_CH2N (inverted TIM1 channel 2 output)."+ },+ {+ "number": "21",+ "name": "PB0/AIN0",+ "type": "input",+ "description": "Port B bit 0 / 10-bit ADC analog input channel 0 with remapping option AFR5 to TIM1_CH1N (inverted TIM1 channel 1 output)."+ },+ {+ "number": "22",+ "name": "PE6/AIN9",+ "type": "input",+ "description": "Port E bit 6 / 10-bit ADC analog input channel 9; input voltage range 0 to VDDA."+ },+ {+ "number": "23",+ "name": "PE5/SPI_NSS",+ "type": "bidirectional",+ "description": "Port E bit 5 / SPI master/slave select control pin; can be GPIO or SPI NSS signal."+ },+ {+ "number": "24",+ "name": "PC1/TIM1_CH1",+ "type": "bidirectional",+ "description": "Port C bit 1 high sink output / TIM1 capture/compare channel 1 or PWM output; high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default)."+ },+ {+ "number": "25",+ "name": "PC2/TIM1_CH2",+ "type": "bidirectional",+ "description": "Port C bit 2 high sink output / TIM1 capture/compare channel 2 or PWM output; high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default)."+ },+ {+ "number": "26",+ "name": "PC3/TIM1_CH3",+ "type": "bidirectional",+ "description": "Port C bit 3 high sink output / TIM1 capture/compare channel 3 or PWM output; high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default)."+ },+ {+ "number": "27",+ "name": "PC5/SPI_SCK",+ "type": "bidirectional",+ "description": "Port C bit 5 high sink output / SPI serial clock; high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default); maximum SPI clock frequency 10 MHz master mode."+ },+ {+ "number": "28",+ "name": "VSSIO_2",+ "type": "power_in",+ "description": "I/O ground reference for LQFP44 package pins on opposite side; must be connected to external VSS."+ },+ {+ "number": "29",+ "name": "VDDIO_2",+ "type": "power_in",+ "description": "I/O power supply 2.95-5.5V for LQFP44 package I/O pins on opposite side."+ },+ {+ "number": "30",+ "name": "PC6/SPI_MOSI",+ "type": "output",+ "description": "Port C bit 6 high sink output / SPI master output slave input (MOSI); high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default); maximum SPI speed 10 MHz."+ },+ {+ "number": "31",+ "name": "PC7/SPI_MISO",+ "type": "input",+ "description": "Port C bit 7 high sink output / SPI master input slave output (MISO); high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default); maximum SPI speed 6 MHz slave mode."+ },+ {+ "number": "32",+ "name": "PG0/CAN_TX",+ "type": "output",+ "description": "Port G bit 0 / beCAN transmit output on STM8S208xx only (not available on STM8S207xx); beCAN maximum transmission speed 1 Mbit/s."+ },+ {+ "number": "33",+ "name": "PG1/CAN_RX",+ "type": "input",+ "description": "Port G bit 1 / beCAN receive input on STM8S208xx only (not available on STM8S207xx); beCAN maximum transmission speed 1 Mbit/s."+ },+ {+ "number": "34",+ "name": "PE2/I2C_SDA",+ "type": "tri_state",+ "description": "Port E bit 2 true open-drain output / I2C data line (SDA); no internal pull-up, no protection diode to VDD; I2C clock frequency up to 400 kHz."+ },+ {+ "number": "35",+ "name": "PE1/I2C_SCL",+ "type": "tri_state",+ "description": "Port E bit 1 true open-drain output / I2C clock line (SCL); no internal pull-up, no protection diode to VDD; I2C clock frequency up to 400 kHz."+ },+ {+ "number": "36",+ "name": "PE0/CLK_CCO",+ "type": "output",+ "description": "Port E bit 0 high sink output / configurable master clock output (CCO); high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default); selectable clock sources from internal oscillators or external input."+ },+ {+ "number": "37",+ "name": "PD0/TIM3_CH2",+ "type": "bidirectional",+ "description": "Port D bit 0 high sink output / TIM3 channel 2 output with remapping options AFR3 to TIM1_BKIN (break input) or AFR2 to CLK_CCO (clock output); output speed O3 (fast/slow programmable with slow default)."+ },+ {+ "number": "38",+ "name": "PD1/SWIM",+ "type": "bidirectional",+ "description": "Port D bit 1 high sink output / SWIM (Single Wire Interface Module) data pin for in-circuit debugging and programming; output speed O4 (fast/slow programmable with fast default); pulled up during reset."+ },+ {+ "number": "39",+ "name": "PD2/TIM3_CH1",+ "type": "bidirectional",+ "description": "Port D bit 2 high sink output / TIM3 channel 1 with remapping option AFR1 to TIM2_CH3 (channel 3 alternate); output speed O3 (fast/slow programmable with slow default)."+ },+ {+ "number": "40",+ "name": "PD3/TIM2_CH2",+ "type": "bidirectional",+ "description": "Port D bit 3 high sink output / TIM2 channel 2 with remapping option AFR0 to ADC_ETR (ADC external trigger); output speed O3 (fast/slow programmable with slow default)."+ },+ {+ "number": "41",+ "name": "PD4/TIM2_CH1",+ "type": "bidirectional",+ "description": "Port D bit 4 high sink output / TIM2 channel 1 with remapping option AFR7 to BEEP (beeper output 1/2/4 kHz); output speed O3 (fast/slow programmable with slow default)."+ },+ {+ "number": "42",+ "name": "PD5/UART3_TX",+ "type": "output",+ "description": "Port D bit 5 / UART3 asynchronous transmit data output; programmable baud rate up to 1 Mbit/s; output speed O1 (slow, up to 2 MHz)."+ },+ {+ "number": "43",+ "name": "PD6/UART3_RX",+ "type": "input",+ "description": "Port D bit 6 / UART3 asynchronous receive data input with ROM bootloader pull-up during boot; programmable baud rate up to 1 Mbit/s; supports LIN 2.1 slave mode with automatic resynchronization."+ },+ {+ "number": "44",+ "name": "PD7/TLI",+ "type": "input",+ "description": "Port D bit 7 / top-level external interrupt input with remapping option AFR4 (44-pin package only) to TIM1_CH4 (TIM1 channel 4 output); output speed O1 (slow, up to 2 MHz)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: PD6/UART3_RX pin state during bootloader: The datasheet states that UART1_RX and UART3_RX pins are p; I2C pins PE1/PE2 are true open-drain with no internal pull-ups or protection diodes to VDD (footnote; Port F (PF0-PF7 analog input channels) is not available on LQFP44 package; these pins only exist on "+ ],+ "pages_sent": 117,+ "cost_usd": 1.7945,+ "at": "2026-09-27T06:48:56"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590902926975967232",+ "pages": 117,+ "sha256": "7adeaa849cf9e22f",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 44,+ "described": 44,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}