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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM8S208S6T6C

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-44(10x10)

STM8S208S6T6C from STMicroelectronics, in a LQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NRST	input	Reset input pin with Schmitt trigger and internal pull-up resistor 30-80 kΩ; VIL 0 to 0.3×VDD, VIH 0.7×VDD to VDD+0.3V.
2	PA1/OSCIN	input	Port A bit 1 / high-speed external oscillator input (1-24 MHz crystal or external clock); when used as oscillator input, requires load capacitance of 20 pF.
3	PA2/OSCOUT	output	Port A bit 2 / high-speed external oscillator output for crystal resonator feedback.
4	VSSIO_1	power_in	I/O ground reference for LQFP44 package pins; must be connected to external VSS.
5	VSS	power_in	Digital ground reference; all VSS pins must be connected to external power supply ground.
6	VCAP	power_in	1.8V internal regulator capacitor connection; use external capacitor CEXT 470-3300 nF with ESR ≤0.3Ω at 1 MHz and ESL ≤15nH.
7	VDD	power_in	Digital power supply 2.95-5.5V; all VDD pins must be connected to external power supply.
8	VDDIO_1	power_in	I/O power supply 2.95-5.5V for LQFP44 package I/O pins.
9	PA4/UART1_RX	bidirectional	Port A bit 4 high sink output / UART1 receive input; high sink capability 4-20mA, output speed O3 (fast/slow programmable with slow default); can be used as analog input AIN4 or GPIO.
10	PA5/UART1_TX	bidirectional	Port A bit 5 high sink output / UART1 transmit output; high sink capability 4-20mA, output speed O3 (fast/slow programmable with slow default); can be used as analog input AIN5 or GPIO.
11	PA6/UART1_CK	bidirectional	Port A bit 6 high sink output / UART1 synchronous clock; high sink capability 4-20mA, output speed O3 (fast/slow programmable with slow default); can be used as GPIO.
12	VDDA	power_in	Analog power supply 3.0-5.5V for 10-bit ADC; must be connected to VDD through LC filter for low noise.
13	VSSA	power_in	Analog ground reference for 10-bit ADC; must be connected to VSS.
14	PB7/AIN7	input	Port B bit 7 / 10-bit ADC analog input channel 7; input voltage range 0 to VDDA.
15	PB6/AIN6	input	Port B bit 6 / 10-bit ADC analog input channel 6; input voltage range 0 to VDDA; internal sample/hold capacitance 3pF, sampling time 0.5-0.75 µs.
16	PB5/AIN5	input	Port B bit 5 / 10-bit ADC analog input channel 5 with remapping option AFR6 to I2C_SDA; input voltage range 0 to VDDA.
17	PB4/AIN4	input	Port B bit 4 / 10-bit ADC analog input channel 4 with remapping option AFR6 to I2C_SCL; input voltage range 0 to VDDA.
18	PB3/AIN3	input	Port B bit 3 / 10-bit ADC analog input channel 3 with remapping option AFR5 to TIM1_ETR (external trigger).
19	PB2/AIN2	input	Port B bit 2 / 10-bit ADC analog input channel 2 with remapping option AFR5 to TIM1_CH3N (inverted TIM1 channel 3 output).
20	PB1/AIN1	input	Port B bit 1 / 10-bit ADC analog input channel 1 with remapping option AFR5 to TIM1_CH2N (inverted TIM1 channel 2 output).
21	PB0/AIN0	input	Port B bit 0 / 10-bit ADC analog input channel 0 with remapping option AFR5 to TIM1_CH1N (inverted TIM1 channel 1 output).
22	PE6/AIN9	input	Port E bit 6 / 10-bit ADC analog input channel 9; input voltage range 0 to VDDA.
23	PE5/SPI_NSS	bidirectional	Port E bit 5 / SPI master/slave select control pin; can be GPIO or SPI NSS signal.
24	PC1/TIM1_CH1	bidirectional	Port C bit 1 high sink output / TIM1 capture/compare channel 1 or PWM output; high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default).
25	PC2/TIM1_CH2	bidirectional	Port C bit 2 high sink output / TIM1 capture/compare channel 2 or PWM output; high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default).
26	PC3/TIM1_CH3	bidirectional	Port C bit 3 high sink output / TIM1 capture/compare channel 3 or PWM output; high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default).
27	PC5/SPI_SCK	bidirectional	Port C bit 5 high sink output / SPI serial clock; high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default); maximum SPI clock frequency 10 MHz master mode.
28	VSSIO_2	power_in	I/O ground reference for LQFP44 package pins on opposite side; must be connected to external VSS.
29	VDDIO_2	power_in	I/O power supply 2.95-5.5V for LQFP44 package I/O pins on opposite side.
30	PC6/SPI_MOSI	output	Port C bit 6 high sink output / SPI master output slave input (MOSI); high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default); maximum SPI speed 10 MHz.
31	PC7/SPI_MISO	input	Port C bit 7 high sink output / SPI master input slave output (MISO); high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default); maximum SPI speed 6 MHz slave mode.
32	PG0/CAN_TX	output	Port G bit 0 / beCAN transmit output on STM8S208xx only (not available on STM8S207xx); beCAN maximum transmission speed 1 Mbit/s.
33	PG1/CAN_RX	input	Port G bit 1 / beCAN receive input on STM8S208xx only (not available on STM8S207xx); beCAN maximum transmission speed 1 Mbit/s.
34	PE2/I2C_SDA	tri_state	Port E bit 2 true open-drain output / I2C data line (SDA); no internal pull-up, no protection diode to VDD; I2C clock frequency up to 400 kHz.
35	PE1/I2C_SCL	tri_state	Port E bit 1 true open-drain output / I2C clock line (SCL); no internal pull-up, no protection diode to VDD; I2C clock frequency up to 400 kHz.
36	PE0/CLK_CCO	output	Port E bit 0 high sink output / configurable master clock output (CCO); high sink output capability 4-20mA, output speed O3 (fast/slow programmable with slow default); selectable clock sources from internal oscillators or external input.
37	PD0/TIM3_CH2	bidirectional	Port D bit 0 high sink output / TIM3 channel 2 output with remapping options AFR3 to TIM1_BKIN (break input) or AFR2 to CLK_CCO (clock output); output speed O3 (fast/slow programmable with slow default).
38	PD1/SWIM	bidirectional	Port D bit 1 high sink output / SWIM (Single Wire Interface Module) data pin for in-circuit debugging and programming; output speed O4 (fast/slow programmable with fast default); pulled up during reset.
39	PD2/TIM3_CH1	bidirectional	Port D bit 2 high sink output / TIM3 channel 1 with remapping option AFR1 to TIM2_CH3 (channel 3 alternate); output speed O3 (fast/slow programmable with slow default).
40	PD3/TIM2_CH2	bidirectional	Port D bit 3 high sink output / TIM2 channel 2 with remapping option AFR0 to ADC_ETR (ADC external trigger); output speed O3 (fast/slow programmable with slow default).
41	PD4/TIM2_CH1	bidirectional	Port D bit 4 high sink output / TIM2 channel 1 with remapping option AFR7 to BEEP (beeper output 1/2/4 kHz); output speed O3 (fast/slow programmable with slow default).
42	PD5/UART3_TX	output	Port D bit 5 / UART3 asynchronous transmit data output; programmable baud rate up to 1 Mbit/s; output speed O1 (slow, up to 2 MHz).
43	PD6/UART3_RX	input	Port D bit 6 / UART3 asynchronous receive data input with ROM bootloader pull-up during boot; programmable baud rate up to 1 Mbit/s; supports LIN 2.1 slave mode with automatic resynchronization.
44	PD7/TLI	input	Port D bit 7 / top-level external interrupt input with remapping option AFR4 (44-pin package only) to TIM1_CH4 (TIM1 channel 4 output); output speed O1 (slow, up to 2 MHz).

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-44(10x10)
Category	Embedded Processors & Controllers
Pins	44

CAD (KiCad official)

Symbol: STM8S208S6T6C
Footprint: Package_QFP:LQFP-44_10x10mm_P0.8mm
3D model: LQFP-44(10x10) (KiCad packages3D, STEP)
3D model files: stm8s208s6t6c-etched.step / stm8s208s6t6c-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm8s208s6t6c.step / stm8s208s6t6c.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (117 pp, sha256 7adeaa849cf9e22f, retrieved 2026-09-27, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF