STM8S208C8T6

{
  "slug": "stm8s208c8t6",
  "version": "0.1.0",
  "type": "component",
  "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "stm8s208c8t6",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
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    "README.md",
    "stm8s208c8t6.kicad_sym",
    "stm8s208c8t6.kicad_mod",
    "stm8s208c8t6.glb",
    "stm8s208c8t6.step",
    "stm8s208c8t6.lbr",
    "docs/hero.png",
    "docs/stm8s208c8t6-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "stm8s208c8t6-hero.glb",
    "stm8s208c8t6-hero.overlay.json"
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  "component": {
    "mpn": "STM8S208C8T6",
    "manufacturer": "STMicroelectronics",
    "package": "LQFP-48(7x7)",
    "pin_count": 48,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586173002908516352",
    "parts": {
      "symbol": "stm8s208c8t6.kicad_sym",
      "footprint": "stm8s208c8t6.kicad_mod",
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      "model_3d_plain": "stm8s208c8t6.glb",
      "model_3d_step": "stm8s208c8t6-etched.step",
      "model_3d_step_plain": "stm8s208c8t6.step",
      "lbr": "stm8s208c8t6.lbr"
    },
    "distributor_links": {
      "lcsc": "C11946",
      "digikey": "497-11592-ND",
      "mouser": "511-STM8S208C8T6"
    },
    "distributor_check": {
      "checked_at": "2026-10-07T20:53:40Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "497-11592-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "511-STM8S208C8T6",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "NRST",
        "type": "bidirectional",
        "description": "Active-low reset pin (I/O type in the pin table) with the NRST pull-up and electrical limits given in section 10.3.7 (Table 41)."
      },
      {
        "number": "2",
        "name": "PA1/OSCIN",
        "type": "bidirectional",
        "description": "Port A1 I/O (slow output O1) that also serves as the resonator/crystal oscillator input OSCIN."
      },
      {
        "number": "3",
        "name": "PA2/OSCOUT",
        "type": "bidirectional",
        "description": "Port A2 I/O (slow output O1) that also serves as the resonator/crystal oscillator output OSCOUT."
      },
      {
        "number": "4",
        "name": "VSSIO_1",
        "type": "power_in",
        "description": "I/O ground."
      },
      {
        "number": "5",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "6",
        "name": "VCAP",
        "type": "power_in",
        "description": "1.8 V regulator capacitor connection; the external VCAP capacitor requirements are given in section 10.3.1."
      },
      {
        "number": "7",
        "name": "VDD",
        "type": "power_in",
        "description": "Digital power supply (2.95 V to 5.5 V operating voltage)."
      },
      {
        "number": "8",
        "name": "VDDIO_1",
        "type": "power_in",
        "description": "I/O power supply."
      },
      {
        "number": "9",
        "name": "PA3/TIM2_CH3",
        "type": "bidirectional",
        "description": "Port A3 I/O (slow output O1) with Timer 2 channel 3 as default alternate function and TIM3_CH1 available after AFR1 remap."
      },
      {
        "number": "10",
        "name": "PA4/UART1_RX",
        "type": "bidirectional",
        "description": "Port A4 high-sink I/O (HS, O3) with UART1 receive; the ROM bootloader pulls this pin up during activation and returns it to floating before a return from the bootloader."
      },
      {
        "number": "11",
        "name": "PA5/UART1_TX",
        "type": "bidirectional",
        "description": "Port A5 high-sink I/O (HS, O3) with UART1 transmit function."
      },
      {
        "number": "12",
        "name": "PA6/UART1_CK",
        "type": "bidirectional",
        "description": "Port A6 high-sink I/O (HS, O3) with UART1 synchronous clock function."
      },
      {
        "number": "13",
        "name": "VDDA",
        "type": "power_in",
        "description": "Analog power supply."
      },
      {
        "number": "14",
        "name": "VSSA",
        "type": "power_in",
        "description": "Analog ground."
      },
      {
        "number": "15",
        "name": "PB7/AIN7",
        "type": "bidirectional",
        "description": "Port B7 I/O (slow output O1) with ADC analog input AIN7."
      },
      {
        "number": "16",
        "name": "PB6/AIN6",
        "type": "bidirectional",
        "description": "Port B6 I/O (slow output O1) with ADC analog input AIN6."
      },
      {
        "number": "17",
        "name": "PB5/AIN5",
        "type": "bidirectional",
        "description": "Port B5 I/O (slow output O1) with ADC analog input AIN5; I2C_SDA is available after AFR6 remap."
      },
      {
        "number": "18",
        "name": "PB4/AIN4",
        "type": "bidirectional",
        "description": "Port B4 I/O (slow output O1) with ADC analog input AIN4; I2C_SCL is available after AFR6 remap."
      },
      {
        "number": "19",
        "name": "PB3/AIN3",
        "type": "bidirectional",
        "description": "Port B3 I/O (slow output O1) with ADC analog input AIN3; TIM1_ETR is available after AFR5 remap."
      },
      {
        "number": "20",
        "name": "PB2/AIN2",
        "type": "bidirectional",
        "description": "Port B2 I/O (slow output O1) with ADC analog input AIN2; TIM1_CH3N is available after AFR5 remap."
      },
      {
        "number": "21",
        "name": "PB1/AIN1",
        "type": "bidirectional",
        "description": "Port B1 I/O (slow output O1) with ADC analog input AIN1; TIM1_CH2N is available after AFR5 remap."
      },
      {
        "number": "22",
        "name": "PB0/AIN0",
        "type": "bidirectional",
        "description": "Port B0 I/O (slow output O1) with ADC analog input AIN0; TIM1_CH1N is available after AFR5 remap."
      },
      {
        "number": "23",
        "name": "PE7/AIN8",
        "type": "bidirectional",
        "description": "Port E7 I/O (slow output O1) with ADC analog input AIN8."
      },
      {
        "number": "24",
        "name": "PE6/AIN9",
        "type": "bidirectional",
        "description": "Port E6 I/O (slow output O1) with ADC analog input AIN9."
      },
      {
        "number": "25",
        "name": "PE5/SPI_NSS",
        "type": "bidirectional",
        "description": "Port E5 I/O (slow output O1) with SPI master/slave select SPI_NSS."
      },
      {
        "number": "26",
        "name": "PC1/TIM1_CH1",
        "type": "bidirectional",
        "description": "Port C1 high-sink I/O (HS, O3) with Timer 1 channel 1."
      },
      {
        "number": "27",
        "name": "PC2/TIM1_CH2",
        "type": "bidirectional",
        "description": "Port C2 high-sink I/O (HS, O3) with Timer 1 channel 2."
      },
      {
        "number": "28",
        "name": "PC3/TIM1_CH3",
        "type": "bidirectional",
        "description": "Port C3 high-sink I/O (HS, O3) with Timer 1 channel 3."
      },
      {
        "number": "29",
        "name": "PC4/TIM1_CH4",
        "type": "bidirectional",
        "description": "Port C4 high-sink I/O (HS, O3) with Timer 1 channel 4."
      },
      {
        "number": "30",
        "name": "PC5/SPI_SCK",
        "type": "bidirectional",
        "description": "Port C5 high-sink I/O (HS, O3) with SPI clock SPI_SCK."
      },
      {
        "number": "31",
        "name": "VSSIO_2",
        "type": "power_in",
        "description": "I/O ground."
      },
      {
        "number": "32",
        "name": "VDDIO_2",
        "type": "power_in",
        "description": "I/O power supply."
      },
      {
        "number": "33",
        "name": "PC6/SPI_MOSI",
        "type": "bidirectional",
        "description": "Port C6 high-sink I/O (HS, O3) with SPI master out / slave in SPI_MOSI."
      },
      {
        "number": "34",
        "name": "PC7/SPI_MISO",
        "type": "bidirectional",
        "description": "Port C7 high-sink I/O (HS, O3) with SPI master in / slave out SPI_MISO."
      },
      {
        "number": "35",
        "name": "PG0/CAN_TX",
        "type": "bidirectional",
        "description": "Port G0 I/O (slow output O1) with beCAN transmit CAN_TX; beCAN is available on STM8S208xx devices only."
      },
      {
        "number": "36",
        "name": "PG1/CAN_RX",
        "type": "bidirectional",
        "description": "Port G1 I/O (slow output O1) with beCAN receive CAN_RX; beCAN is available on STM8S208xx devices only."
      },
      {
        "number": "37",
        "name": "PE3/TIM1_BKIN",
        "type": "bidirectional",
        "description": "Port E3 I/O (slow output O1) with Timer 1 break input TIM1_BKIN."
      },
      {
        "number": "38",
        "name": "PE2/I2C_SDA",
        "type": "bidirectional",
        "description": "Port E2 true open-drain I/O (T: no P-buffer and no protection diode to VDD) carrying the I2C data line I2C_SDA."
      },
      {
        "number": "39",
        "name": "PE1/I2C_SCL",
        "type": "bidirectional",
        "description": "Port E1 true open-drain I/O (T: no P-buffer and no protection diode to VDD) carrying the I2C clock line I2C_SCL."
      },
      {
        "number": "40",
        "name": "PE0/CLK_CCO",
        "type": "bidirectional",
        "description": "Port E0 high-sink I/O (HS, O3) with configurable clock output CLK_CCO."
      },
      {
        "number": "41",
        "name": "PD0/TIM3_CH2",
        "type": "bidirectional",
        "description": "Port D0 high-sink I/O (HS, O3) with Timer 3 channel 2; TIM1_BKIN (AFR3) and CLK_CCO (AFR2) are available after remap."
      },
      {
        "number": "42",
        "name": "PD1/SWIM",
        "type": "bidirectional",
        "description": "Port D1 high-sink I/O (HS, O4) used as the SWIM data interface; it is input pull-up during the reset phase and after internal reset release."
      },
      {
        "number": "43",
        "name": "PD2/TIM3_CH1",
        "type": "bidirectional",
        "description": "Port D2 high-sink I/O (HS, O3) with Timer 3 channel 1; TIM2_CH3 is available after AFR1 remap."
      },
      {
        "number": "44",
        "name": "PD3/TIM2_CH2",
        "type": "bidirectional",
        "description": "Port D3 high-sink I/O (HS, O3) with Timer 2 channel 2; ADC_ETR is available after AFR0 remap."
      },
      {
        "number": "45",
        "name": "PD4/TIM2_CH1/BEEP",
        "type": "bidirectional",
        "description": "Port D4 high-sink I/O (HS, O3) with Timer 2 channel 1; BEEP output is available after AFR7 remap."
      },
      {
        "number": "46",
        "name": "PD5/UART3_TX",
        "type": "bidirectional",
        "description": "Port D5 I/O (slow output O1) with UART3 data transmit UART3_TX."
      },
      {
        "number": "47",
        "name": "PD6/UART3_RX",
        "type": "bidirectional",
        "description": "Port D6 I/O (slow output O1) with UART3 data receive UART3_RX; the ROM bootloader pulls this pin up during activation and returns it to floating before a return from the bootloader."
      },
      {
        "number": "48",
        "name": "PD7/TLI",
        "type": "bidirectional",
        "description": "Port D7 I/O (slow output O1) with top level interrupt input TLI."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Datasheet types NRST as 'I/O'; mapped to bidirectional. Many schematic tools treat a reset line as i; VCAP is a 1.8 V regulator capacitor connection, not a supply the MCU draws from. Datasheet types it ; beCAN pins (CAN_TX/CAN_RX) are only available on STM8S208xx devices. This MPN is STM8S208C8T6, so th"
        ],
        "pages_sent": 30,
        "cost_usd": 0.1951,
        "at": "2026-10-07T20:53:16"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586173002908516352",
        "pages": 103,
        "sha256": "9ab3f7b6dda7af91",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 48,
        "described": 48,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "stm8s208c8t6-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
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        "seat": "z = 0",
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        "sha256": "feaa965520d341cee5af0a97d8c8bd1c6cc3ce4432b01fbfd1106c8830124d03",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
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  }
}