component
STM8S208C6T6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "stm8s208c6t6",
"version": "0.1.0",
"type": "component",
"description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"stm8s208c6t6",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
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"path": "docs/hero.png"
},
"files": [
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"stm8s208c6t6.lbr",
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"docs/stm8s208c6t6-datasheet.pdf",
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"viewers/footprint.html",
"stm8s208c6t6-hero.glb",
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],
"component": {
"mpn": "STM8S208C6T6",
"manufacturer": "STMicroelectronics",
"package": "LQFP-48(7x7)",
"pin_count": 48,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588923748187979776",
"parts": {
"symbol": "stm8s208c6t6.kicad_sym",
"footprint": "stm8s208c6t6.kicad_mod",
"model_3d": "stm8s208c6t6-hero.glb",
"model_3d_plain": "stm8s208c6t6.glb",
"model_3d_step": "stm8s208c6t6-etched.step",
"model_3d_step_plain": "stm8s208c6t6.step",
"lbr": "stm8s208c6t6.lbr"
},
"distributor_links": {
"lcsc": "C1340266",
"digikey": "497-18617-ND",
"mouser": "511-STM8S208C6T6"
},
"distributor_check": {
"checked_at": "2026-10-07T21:50:46Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "497-18617-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "511-STM8S208C6T6",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "NRST",
"type": "bidirectional",
"description": "Reset pin (I/O); its reset-pin electrical characteristics are specified in Section 10.3.7 of the datasheet."
},
{
"number": "2",
"name": "PA1/OSCIN",
"type": "bidirectional",
"description": "Port A1 I/O that doubles as the resonator/crystal oscillator input (OSCIN), with slow output speed O1 (up to 2 MHz)."
},
{
"number": "3",
"name": "PA2/OSCOUT",
"type": "bidirectional",
"description": "Port A2 I/O that doubles as the resonator/crystal oscillator output (OSCOUT), with slow output speed O1 (up to 2 MHz)."
},
{
"number": "4",
"name": "VSSIO_1",
"type": "power_in",
"description": "I/O ground."
},
{
"number": "5",
"name": "VSS",
"type": "power_in",
"description": "Digital ground."
},
{
"number": "6",
"name": "VCAP",
"type": "power_out",
"description": "1.8 V regulator capacitor connection; the external VCAP capacitor requirements are given in Section 10.3.1."
},
{
"number": "7",
"name": "VDD",
"type": "power_in",
"description": "Digital power supply, 2.95 V to 5.5 V operating voltage."
},
{
"number": "8",
"name": "VDDIO_1",
"type": "power_in",
"description": "I/O power supply."
},
{
"number": "9",
"name": "PA3/TIM2_CH3",
"type": "bidirectional",
"description": "Port A3 I/O; default alternate function is Timer 2 channel 3, remappable to TIM3_CH1 via option bits AFR1."
},
{
"number": "10",
"name": "PA4/UART1_RX",
"type": "bidirectional",
"description": "Port A4 I/O with high sink capability, used as UART1 receive; its default state is controlled by the ROM bootloader."
},
{
"number": "11",
"name": "PA5/UART1_TX",
"type": "bidirectional",
"description": "Port A5 I/O with high sink capability, used as UART1 transmit."
},
{
"number": "12",
"name": "PA6/UART1_CK",
"type": "bidirectional",
"description": "Port A6 I/O with high sink capability, used as UART1 synchronous clock."
},
{
"number": "13",
"name": "VDDA",
"type": "power_in",
"description": "Analog power supply."
},
{
"number": "14",
"name": "VSSA",
"type": "power_in",
"description": "Analog ground."
},
{
"number": "15",
"name": "PB7/AIN7",
"type": "bidirectional",
"description": "Port B7 I/O, ADC analog input 7."
},
{
"number": "16",
"name": "PB6/AIN6",
"type": "bidirectional",
"description": "Port B6 I/O, ADC analog input 6."
},
{
"number": "17",
"name": "PB5/AIN5",
"type": "bidirectional",
"description": "Port B5 I/O, ADC analog input 5; I2C_SDA is available as remapped alternate function (AFR6)."
},
{
"number": "18",
"name": "PB4/AIN4",
"type": "bidirectional",
"description": "Port B4 I/O, ADC analog input 4; I2C_SCL is available as remapped alternate function (AFR6)."
},
{
"number": "19",
"name": "PB3/AIN3",
"type": "bidirectional",
"description": "Port B3 I/O, ADC analog input 3; TIM1_ETR is available as remapped alternate function (AFR5)."
},
{
"number": "20",
"name": "PB2/AIN2",
"type": "bidirectional",
"description": "Port B2 I/O, ADC analog input 2; TIM1_CH3N is available as remapped alternate function (AFR5)."
},
{
"number": "21",
"name": "PB1/AIN1",
"type": "bidirectional",
"description": "Port B1 I/O, ADC analog input 1; TIM1_CH2N is available as remapped alternate function (AFR5)."
},
{
"number": "22",
"name": "PB0/AIN0",
"type": "bidirectional",
"description": "Port B0 I/O, ADC analog input 0; TIM1_CH1N is available as remapped alternate function (AFR5)."
},
{
"number": "23",
"name": "PE7/AIN8",
"type": "bidirectional",
"description": "Port E7 I/O, ADC analog input 8."
},
{
"number": "24",
"name": "PE6/AIN9",
"type": "bidirectional",
"description": "Port E6 I/O, ADC analog input 9."
},
{
"number": "25",
"name": "PE5/SPI_NSS",
"type": "bidirectional",
"description": "Port E5 I/O, SPI master/slave select."
},
{
"number": "26",
"name": "PC1/TIM1_CH1",
"type": "bidirectional",
"description": "Port C1 I/O with high sink capability, Timer 1 channel 1."
},
{
"number": "27",
"name": "PC2/TIM1_CH2",
"type": "bidirectional",
"description": "Port C2 I/O with high sink capability, Timer 1 channel 2."
},
{
"number": "28",
"name": "PC3/TIM1_CH3",
"type": "bidirectional",
"description": "Port C3 I/O with high sink capability, Timer 1 channel 3."
},
{
"number": "29",
"name": "PC4/TIM1_CH4",
"type": "bidirectional",
"description": "Port C4 I/O with high sink capability, Timer 1 channel 4."
},
{
"number": "30",
"name": "PC5/SPI_SCK",
"type": "bidirectional",
"description": "Port C5 I/O with high sink capability, SPI clock."
},
{
"number": "31",
"name": "VSSIO_2",
"type": "power_in",
"description": "I/O ground."
},
{
"number": "32",
"name": "VDDIO_2",
"type": "power_in",
"description": "I/O power supply."
},
{
"number": "33",
"name": "PC6/SPI_MOSI",
"type": "bidirectional",
"description": "Port C6 I/O with high sink capability, SPI master out / slave in."
},
{
"number": "34",
"name": "PC7/SPI_MISO",
"type": "bidirectional",
"description": "Port C7 I/O with high sink capability, SPI master in / slave out."
},
{
"number": "35",
"name": "PG0/CAN_TX",
"type": "bidirectional",
"description": "Port G0 I/O, beCAN transmit (available on STM8S208xx devices only)."
},
{
"number": "36",
"name": "PG1/CAN_RX",
"type": "bidirectional",
"description": "Port G1 I/O, beCAN receive (available on STM8S208xx devices only)."
},
{
"number": "37",
"name": "PE3/TIM1_BKIN",
"type": "bidirectional",
"description": "Port E3 I/O, Timer 1 break input."
},
{
"number": "38",
"name": "PE2/I2C_SDA",
"type": "bidirectional",
"description": "Port E2 true open-drain I/O (P-buffer and protection diode to VDD not implemented) used as I2C data."
},
{
"number": "39",
"name": "PE1/I2C_SCL",
"type": "bidirectional",
"description": "Port E1 true open-drain I/O (P-buffer and protection diode to VDD not implemented) used as I2C clock."
},
{
"number": "40",
"name": "PE0/CLK_CCO",
"type": "bidirectional",
"description": "Port E0 I/O with high sink capability, configurable clock output."
},
{
"number": "41",
"name": "PD0/TIM3_CH2",
"type": "bidirectional",
"description": "Port D0 I/O with high sink capability, Timer 3 channel 2; TIM1_BKIN (AFR3) and CLK_CCO (AFR2) are remappable alternate functions."
},
{
"number": "42",
"name": "PD1/SWIM",
"type": "bidirectional",
"description": "Port D1 I/O with high sink capability, SWIM data interface; it is in input pull-up during the reset phase and after internal reset release."
},
{
"number": "43",
"name": "PD2/TIM3_CH1",
"type": "bidirectional",
"description": "Port D2 I/O with high sink capability, Timer 3 channel 1; TIM2_CH3 is a remappable alternate function (AFR1)."
},
{
"number": "44",
"name": "PD3/TIM2_CH2",
"type": "bidirectional",
"description": "Port D3 I/O with high sink capability, Timer 2 channel 2; ADC_ETR is a remappable alternate function (AFR0)."
},
{
"number": "45",
"name": "PD4/TIM2_CH1/BEEP",
"type": "bidirectional",
"description": "Port D4 I/O with high sink capability, Timer 2 channel 1; BEEP output is a remappable alternate function (AFR7)."
},
{
"number": "46",
"name": "PD5/UART3_TX",
"type": "bidirectional",
"description": "Port D5 I/O, UART3 data transmit."
},
{
"number": "47",
"name": "PD6/UART3_RX",
"type": "bidirectional",
"description": "Port D6 I/O, UART3 data receive; its default state is controlled by the ROM bootloader and it returns to floating before a return from the bootloader."
},
{
"number": "48",
"name": "PD7/TLI",
"type": "bidirectional",
"description": "Port D7 I/O, top level interrupt (TLI)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: MPN STM8S208C6T6 decodes as C = 48 pins, 6 = 32 KB Flash, T = LQFP, 6 = -40 to 85 °C, so the LQFP48 ; VCAP was typed power_out because the datasheet lists it only as 'S' (1.8 V regulator capacitor). Con; NRST was typed bidirectional because the datasheet lists it as I/O. Confirm this against the reset-p"
],
"pages_sent": 48,
"cost_usd": 0.2286,
"at": "2026-10-07T21:50:23"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588923748187979776",
"pages": 117,
"sha256": "7adeaa849cf9e22f",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 48,
"described": 48,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "stm8s208c6t6.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
1.5
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "stm8s208c6t6-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
1.5
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "cb56510d5ca4391b3ae5342a4b1a4a59aa2200d1ec292d9769ed1432a8b98ef5",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}