component
STM8S207RBT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM8S207RBT6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM8S207RBT6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NRST | input | Reset pin with internal pull-up resistor that triggers device reset when pulled low |
| 2 | PA1/OSCIN | input | Port A1 or crystal oscillator input supporting 1-24 MHz external clock |
| 3 | PA2/OSCOUT | output | Port A2 or crystal oscillator feedback output for oscillator circuit |
| 4 | VSSIO_1 | power_in | I/O power supply ground pin |
| 5 | VSS | power_in | Digital ground pin |
| 6 | VCAP | passive | 1.8V regulator capacitor pin requiring 470-3300 nF external capacitor with ESR ≤ 0.3 Ω |
| 7 | VDD | power_in | Digital power supply pin (2.95-5.5 V) |
| 8 | VDDIO_1 | power_in | I/O power supply pin (2.95-5.5 V) |
| 9 | PA3/TIM2_CH3 | bidirectional | Port A3 GPIO or Timer 2 channel 3 output, can be remapped to TIM3_CH1 |
| 10 | PA4/UART1_RX | input | Port A4 or UART1 receive input with pull-up, controlled by bootloader |
| 11 | PA5/UART1_TX | output | Port A4 or UART1 transmit output |
| 12 | PA6/UART1_CK | output | Port A6 or UART1 synchronous clock output |
| 13 | PF7/AIN15 | input | Port F7 or analog input 15 (0 to VDDA voltage range) |
| 14 | PF6/AIN14 | input | Port F6 or analog input 14 (0 to VDDA voltage range) |
| 15 | PF5/AIN13 | input | Port F5 or analog input 13 (0 to VDDA voltage range) |
| 16 | PF4/AIN12 | input | Port F4 or analog input 12 (0 to VDDA voltage range) |
| 17 | PF3/AIN11 | input | Port F3 or analog input 11 (0 to VDDA voltage range) |
| 18 | VREF+ | power_in | ADC positive reference voltage (2.75-VDDA V) |
| 19 | VDDA | power_in | Analog power supply pin (3-5.5 V) |
| 20 | VSSA | power_in | Analog ground pin |
| 21 | VREF- | power_in | ADC negative reference voltage (VSSA-0.5 V) |
| 22 | PF0/AIN10 | input | Port F0 or analog input 10 (0 to VDDA voltage range) |
| 23 | PB7/AIN7 | input | Port B7 or analog input 7 (0 to VDDA voltage range) |
| 24 | PB6/AIN6 | input | Port B6 or analog input 6 (0 to VDDA voltage range) |
| 25 | PB5/AIN5 | input | Port B5 or analog input 5 or I2C data line (SDA) when remapped |
| 26 | PB4/AIN4 | input | Port B4 or analog input 4 or I2C clock line (SCL) when remapped |
| 27 | PB3/AIN3 | input | Port B3 or analog input 3 or Timer 1 external trigger input when remapped |
| 28 | PB2/AIN2 | input | Port B2 or analog input 2 or Timer 1 channel 3 complement output when remapped |
| 29 | PB1/AIN1 | input | Port B1 or analog input 1 or Timer 1 channel 2 complement output when remapped |
| 30 | PB0/AIN0 | input | Port B0 or analog input 0 or Timer 1 channel 1 complement output when remapped |
| 31 | PE7/AIN8 | input | Port E7 or analog input 8 (0 to VDDA voltage range) |
| 32 | PE6/AIN9 | input | Port E6 or analog input 9 (0 to VDDA voltage range) |
| 33 | PE5/SPI_NSS | bidirectional | Port E5 or SPI master/slave select signal |
| 34 | PC1/TIM1_CH1 | output | Port C1 or Timer 1 channel 1 output with high-sink capability |
| 35 | PC2/TIM1_CH2 | output | Port C2 or Timer 1 channel 2 output with high-sink capability |
| 36 | PC3/TIM1_CH3 | output | Port C3 or Timer 1 channel 3 output with high-sink capability |
| 37 | PC4/TIM1_CH4 | output | Port C4 or Timer 1 channel 4 output with high-sink capability |
| 38 | PC5/SPI_SCK | output | Port C5 or SPI serial clock output with high-sink capability |
| 39 | VSSIO_2 | power_in | I/O power supply ground pin |
| 40 | VDDIO_2 | power_in | I/O power supply pin (2.95-5.5 V) |
| 41 | PC6/SPI_MOSI | output | Port C6 or SPI master out/slave in with high-sink capability |
| 42 | PC7/SPI_MISO | input | Port C7 or SPI master in/slave out with high-sink capability |
| 43 | PG0/CAN_TX | output | Port G0 or beCAN transmit output (available on STM8S208xx only) |
| 44 | PG1/CAN_RX | input | Port G1 or beCAN receive input (available on STM8S208xx only) |
| 45 | PG2 | bidirectional | Port G2 general-purpose I/O pin |
| 46 | PG3 | bidirectional | Port G3 general-purpose I/O pin |
| 47 | PG4 | bidirectional | Port G4 general-purpose I/O pin |
| 48 | PI0 | bidirectional | Port I0 general-purpose I/O pin |
| 49 | PG5 | bidirectional | Port G5 general-purpose I/O pin |
| 50 | PG6 | bidirectional | Port G6 general-purpose I/O pin |
| 51 | PG7 | bidirectional | Port G7 general-purpose I/O pin |
| 52 | PE4 | bidirectional | Port E4 general-purpose I/O pin |
| 53 | PE3/TIM1_BKIN | input | Port E3 or Timer 1 break input to force timer outputs to defined state |
| 54 | PE2/I2C_SDA | tri_state | Port E2 or I2C data line (true open-drain with no push-pull driver) |
| 55 | PE1/I2C_SCL | tri_state | Port E1 or I2C clock line (true open-drain with no push-pull driver) |
| 56 | PE0/CLK_CCO | output | Port E0 or configurable clock output with high-sink capability |
| 57 | PD0/TIM3_CH2 | bidirectional | Port D0 or Timer 3 channel 2 output, can be remapped to Timer 1 break input or clock output |
| 58 | PD1/SWIM | bidirectional | Port D1 or SWIM single-wire debug interface with pull-up during reset |
| 59 | PD2/TIM3_CH1 | bidirectional | Port D2 or Timer 3 channel 1 output, can be remapped to Timer 2 channel 3 with high-sink capability |
| 60 | PD3/TIM2_CH2 | bidirectional | Port D3 or Timer 2 channel 2 output, can be remapped to ADC external trigger with high-sink capability |
| 61 | PD4/TIM2_CH1/BEEP | bidirectional | Port D4 or Timer 2 channel 1 output or beeper output (1/2/4 kHz) with high-sink capability |
| 62 | PD5/UART3_TX | output | Port D5 or UART3 transmit output |
| 63 | PD6/UART3_RX | input | Port D6 or UART3 receive input with pull-up, controlled by bootloader |
| 64 | PD7/TLI | input | Port D7 or top-level interrupt input, can be remapped to Timer 1 channel 4 output |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM8S207RBT6 - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
stm8s207rbt6-etched.step/stm8s207rbt6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm8s207rbt6.step/stm8s207rbt6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (103 pp, sha256
9ab3f7b6dda7af91, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).