component
STM8S207R8T6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM8S207R8T6TR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM8S207R8T6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NRST | bidirectional | Reset input/output pin with internal weak pull-up resistor (30-80 kΩ) and open-drain output capability. |
| 2 | PA1/OSCIN | bidirectional | GPIO Port A1 / Crystal oscillator or external clock input (1-24 MHz). |
| 3 | PA2/OSCOUT | bidirectional | GPIO Port A2 / Crystal oscillator output buffering external frequency source. |
| 4 | VSSIO_1 | power_in | I/O power supply ground connection. |
| 5 | VSS | power_in | Digital core power supply ground. |
| 6 | VCAP | passive | External capacitor connection for internal 1.8V regulator (470-3300 nF with ESR < 0.3 Ω). |
| 7 | VDD | power_in | Digital power supply input (2.95-5.5 V). |
| 8 | VDDIO_1 | power_in | I/O power supply input (2.95-5.5 V). |
| 9 | PA3/TIM2_CH3 | bidirectional | GPIO Port A3 / Timer 2 channel 3 output with alternate function TIM3_CH1. |
| 10 | PA4/UART1_RX | bidirectional | GPIO Port A4 (high-sink) / UART1 receive input with internal pull-up during bootloader. |
| 11 | PA5/UART1_TX | bidirectional | GPIO Port A5 (high-sink) / UART1 transmit output. |
| 12 | PA6/UART1_CK | bidirectional | GPIO Port A6 (high-sink) / UART1 synchronous clock output for SPI emulation. |
| 13 | PF7/AIN15 | bidirectional | GPIO Port F7 / Analog input channel 15 for 10-bit ADC (0 to VDDA). |
| 14 | PF6/AIN14 | bidirectional | GPIO Port F6 / Analog input channel 14 for 10-bit ADC (0 to VDDA). |
| 15 | PF5/AIN13 | bidirectional | GPIO Port F5 / Analog input channel 13 for 10-bit ADC (0 to VDDA). |
| 16 | PF4/AIN12 | bidirectional | GPIO Port F4 / Analog input channel 12 for 10-bit ADC (0 to VDDA). |
| 17 | PF3/AIN11 | bidirectional | GPIO Port F3 / Analog input channel 11 for 10-bit ADC (0 to VDDA). |
| 18 | VREF+ | power_in | ADC positive reference voltage input (VREF+ = 2.75 V to VDDA). |
| 19 | VDDA | power_in | Analog power supply input (3.0-5.5 V) for ADC and analog circuits. |
| 20 | VSSA | power_in | Analog power supply ground, must be connected to VSS. |
| 21 | VREF- | power_in | ADC negative reference voltage input (VSSA to 0.5 V below VDDA). |
| 22 | PF0/AIN10 | bidirectional | GPIO Port F0 / Analog input channel 10 for 10-bit ADC (0 to VDDA). |
| 23 | PB7/AIN7 | bidirectional | GPIO Port B7 / Analog input channel 7 for 10-bit ADC (0 to VDDA). |
| 24 | PB6/AIN6 | bidirectional | GPIO Port B6 / Analog input channel 6 for 10-bit ADC (0 to VDDA). |
| 25 | PB5/AIN5 | bidirectional | GPIO Port B5 / Analog input channel 5 with alternate function I2C_SDA. |
| 26 | PB4/AIN4 | bidirectional | GPIO Port B4 / Analog input channel 4 with alternate function I2C_SCL. |
| 27 | PB3/AIN3 | bidirectional | GPIO Port B3 / Analog input channel 3 with alternate function TIM1_ETR. |
| 28 | PB2/AIN2 | bidirectional | GPIO Port B2 / Analog input channel 2 with alternate function TIM1_CH3N. |
| 29 | PB1/AIN1 | bidirectional | GPIO Port B1 / Analog input channel 1 with alternate function TIM1_CH2N. |
| 30 | PB0/AIN0 | bidirectional | GPIO Port B0 / Analog input channel 0 with alternate function TIM1_CH1N. |
| 31 | PE7/AIN8 | bidirectional | GPIO Port E7 / Analog input channel 8 for 10-bit ADC (0 to VDDA). |
| 32 | PE6/AIN9 | bidirectional | GPIO Port E6 / Analog input channel 9 for 10-bit ADC (0 to VDDA). |
| 33 | PE5/SPI_NSS | bidirectional | GPIO Port E5 / SPI master/slave select input (active low). |
| 34 | PC1/TIM1_CH1 | bidirectional | GPIO Port C1 (high-sink, HS) / Timer 1 channel 1 output with PWM capability. |
| 35 | PC2/TIM1_CH2 | bidirectional | GPIO Port C2 (high-sink, HS) / Timer 1 channel 2 output with PWM capability. |
| 36 | PC3/TIM1_CH3 | bidirectional | GPIO Port C3 (high-sink, HS) / Timer 1 channel 3 output with PWM capability. |
| 37 | PC4/TIM1_CH4 | bidirectional | GPIO Port C4 (high-sink, HS) / Timer 1 channel 4 output. |
| 38 | PC5/SPI_SCK | bidirectional | GPIO Port C5 (high-sink, HS) / SPI serial clock output (master) or input (slave). |
| 39 | VSSIO_2 | power_in | I/O power supply ground connection. |
| 40 | VDDIO_2 | power_in | I/O power supply input (2.95-5.5 V). |
| 41 | PC6/SPI_MOSI | bidirectional | GPIO Port C6 (high-sink, HS) / SPI master-out/slave-in data line (bidirectional). |
| 42 | PC7/SPI_MISO | bidirectional | GPIO Port C7 (high-sink, HS) / SPI master-in/slave-out data line (bidirectional). |
| 43 | PG0/CAN_TX | bidirectional | GPIO Port G0 / CAN transmit output (STM8S208xx devices only, not available on STM8S207xx). |
| 44 | PG1/CAN_RX | bidirectional | GPIO Port G1 / CAN receive input (STM8S208xx devices only, not available on STM8S207xx). |
| 45 | PG2 | bidirectional | GPIO Port G2 output only, no alternate functions. |
| 46 | PG3 | bidirectional | GPIO Port G3 output only, no alternate functions. |
| 47 | PG4 | bidirectional | GPIO Port G4 output only, no alternate functions. |
| 48 | PI0 | bidirectional | GPIO Port I0 output only, no alternate functions. |
| 49 | PG5 | bidirectional | GPIO Port G5 output only, no alternate functions. |
| 50 | PG6 | bidirectional | GPIO Port G6 output only, no alternate functions. |
| 51 | PG7 | bidirectional | GPIO Port G7 output only, no alternate functions. |
| 52 | PE4 | bidirectional | GPIO Port E4 input/output capable. |
| 53 | PE3/TIM1_BKIN | bidirectional | GPIO Port E3 / Timer 1 break input for external fault signal management. |
| 54 | PE2/I2C_SDA | bidirectional | GPIO Port E2 (true open-drain, T) / I2C serial data line requiring external pull-up. |
| 55 | PE1/I2C_SCL | bidirectional | GPIO Port E1 (true open-drain, T) / I2C serial clock line requiring external pull-up. |
| 56 | PE0/CLK_CCO | bidirectional | GPIO Port E0 (high-sink, HS) / Configurable clock output with alternate functions. |
| 57 | PD0/TIM3_CH2 | bidirectional | GPIO Port D0 (high-sink, HS) / Timer 3 channel 2 output with alternate functions TIM1_BKIN and CLK_CCO. |
| 58 | PD1/SWIM | bidirectional | GPIO Port D1 (high-sink, HS, weak pull-up during reset) / Single Wire Interface Module debug interface. |
| 59 | PD2/TIM3_CH1 | bidirectional | GPIO Port D2 (high-sink, HS) / Timer 3 channel 1 output with alternate function TIM2_CH3. |
| 60 | PD3/TIM2_CH2 | bidirectional | GPIO Port D3 (high-sink, HS) / Timer 2 channel 2 output with alternate function ADC_ETR. |
| 61 | PD4/TIM2_CH1 | bidirectional | GPIO Port D4 (high-sink, HS) / Timer 2 channel 1 output with alternate function BEEP (1/2/4 kHz output). |
| 62 | PD5/UART3_TX | bidirectional | GPIO Port D5 / UART3 transmit output. |
| 63 | PD6/UART3_RX | bidirectional | GPIO Port D6 / UART3 receive input with internal pull-up during bootloader. |
| 64 | PD7/TLI | bidirectional | GPIO Port D7 / Top level interrupt external interrupt input with alternate function TIM1_CH4. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM8S207R8T6TR - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
stm8s207r8t6tr-etched.step/stm8s207r8t6tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm8s207r8t6tr.step/stm8s207r8t6tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (117 pp, sha256
7adeaa849cf9e22f, retrieved 2026-09-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).