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Contents

README

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STM8S207CBT6TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM8S207CBT6TR from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NRST bidirectional Reset input; pull-up to VDD with external filter recommended per Figure 36
2 PA1/OSCIN bidirectional Port A1; external crystal oscillator input or GPIO
3 PA2/OSCOUT bidirectional Port A2; external crystal oscillator output or GPIO
4 VSSIO_1 power_in I/O ground supply
5 VSS power_in Digital ground supply
6 VCAP power_in 1.8 V internal regulator decoupling capacitor connection; 470-3300 nF ESR <0.3 Ω required
7 VDD power_in Digital power supply 2.95-5.5 V
8 VDDIO_1 power_in I/O power supply 2.95-5.5 V
9 PA3/TIM2_CH3 bidirectional Port A3; GPIO or Timer 2 channel 3 output; remappable to TIM3_CH1 via AFR1
10 PA4/UART1_RX bidirectional Port A4; high-sink GPIO with 10-bit ADC or UART1 receive input
11 PA5/UART1_TX bidirectional Port A5; high-sink GPIO with 10-bit ADC or UART1 transmit output
12 PA6/UART1_CK bidirectional Port A6; high-sink GPIO or UART1 synchronous clock
13 VDDA power_in Analog power supply 2.95-5.5 V for ADC
14 VSSA power_in Analog ground supply
15 PB7/AIN7 bidirectional Port B7; GPIO with weak pull-up or 10-bit ADC analog input channel 7
16 PB6/AIN6 bidirectional Port B6; GPIO with weak pull-up or 10-bit ADC analog input channel 6
17 PB5/AIN5 bidirectional Port B5; GPIO with weak pull-up or 10-bit ADC analog input channel 5; remappable to I2C_SDA via AFR6
18 PB4/AIN4 bidirectional Port B4; GPIO with weak pull-up or 10-bit ADC analog input channel 4; remappable to I2C_SCL via AFR6
19 PB3/AIN3 bidirectional Port B3; GPIO with weak pull-up or 10-bit ADC analog input channel 3; remappable to TIM1_ETR via AFR5
20 PB2/AIN2 bidirectional Port B2; GPIO with weak pull-up or 10-bit ADC analog input channel 2; remappable to TIM1_CH3N via AFR5
21 PB1/AIN1 bidirectional Port B1; GPIO with weak pull-up or 10-bit ADC analog input channel 1; remappable to TIM1_CH2N via AFR5
22 PB0/AIN0 bidirectional Port B0; GPIO with weak pull-up or 10-bit ADC analog input channel 0; remappable to TIM1_CH1N via AFR5
23 PE7/AIN8 bidirectional Port E7; GPIO with weak pull-up or 10-bit ADC analog input channel 8
24 PE6/AIN9 bidirectional Port E6; GPIO with weak pull-up or 10-bit ADC analog input channel 9
25 PE5/SPI_NSS bidirectional Port E5; GPIO with weak pull-up or SPI slave select input
26 PC1/TIM1_CH1 bidirectional Port C1; high-sink GPIO with weak pull-up or Timer 1 channel 1 output
27 PC2/TIM1_CH2 bidirectional Port C2; high-sink GPIO with weak pull-up or Timer 1 channel 2 output
28 PC3/TIM1_CH3 bidirectional Port C3; high-sink GPIO with weak pull-up or Timer 1 channel 3 output
29 PC4/TIM1_CH4 bidirectional Port C4; high-sink GPIO with weak pull-up or Timer 1 channel 4 output
30 PC5/SPI_SCK bidirectional Port C5; high-sink GPIO with weak pull-up or SPI clock output
31 VSSIO_2 power_in I/O ground supply
32 VDDIO_2 power_in I/O power supply 2.95-5.5 V
33 PC6/SPI_MOSI bidirectional Port C6; high-sink GPIO with weak pull-up or SPI master-out/slave-in data line
34 PC7/SPI_MISO bidirectional Port C7; high-sink GPIO with weak pull-up or SPI master-in/slave-out data line
35 PG0/CAN_TX bidirectional Port G0; GPIO or beCAN transmit output (STM8S208xx only)
36 PG1/CAN_RX bidirectional Port G1; GPIO or beCAN receive input (STM8S208xx only)
37 PE3/TIM1_BKIN bidirectional Port E3; GPIO with weak pull-up or Timer 1 break input
38 PE2/I2C_SDA tri_state Port E2; true open-drain I2C data line with no internal pull-up; external 4.7 kΩ pull-up required
39 PE1/I2C_SCL tri_state Port E1; true open-drain I2C clock line with no internal pull-up; external 4.7 kΩ pull-up required
40 PE0/CLK_CCO bidirectional Port E0; high-sink GPIO with weak pull-up or configurable clock output
41 PD0/TIM3_CH2 bidirectional Port D0; high-sink GPIO with weak pull-up or Timer 3 channel 2 output; remappable to TIM1_BKIN or CLK_CCO via AFR3/AFR2
42 PD1/SWIM bidirectional Port D1; high-sink GPIO with pull-up during reset phase or SWIM single-wire debug interface
43 PD2/TIM3_CH1 bidirectional Port D2; high-sink GPIO with weak pull-up or Timer 3 channel 1 output; remappable to TIM2_CH3 via AFR1
44 PD3/TIM2_CH2 bidirectional Port D3; high-sink GPIO with weak pull-up or Timer 2 channel 2 output; remappable to ADC_ETR via AFR0
45 PD4/TIM2_CH1 bidirectional Port D4; high-sink GPIO with weak pull-up or Timer 2 channel 1 output; remappable to BEEP output via AFR7
46 PD5/UART3_TX bidirectional Port D5; GPIO or UART3 transmit output for data transmission
47 PD6/UART3_RX bidirectional Port D6; GPIO with weak pull-up or UART3 receive input; pull-up controlled by bootloader during reset
48 PD7/TLI bidirectional Port D7; GPIO with weak pull-up or top-level interrupt input; remappable to TIM1_CH4 via AFR4 (44-pin package only)

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM8S207CBT6TR
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm8s207cbt6tr-etched.step / stm8s207cbt6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm8s207cbt6tr.step / stm8s207cbt6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (117 pp, sha256 076cd3ee275e9dc3, retrieved 2026-09-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF