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STM8S105K4T6CTR

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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STM8S105K4T6CTR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)

STM8S105K4T6CTR from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NRST bidirectional System reset pin with internal weak pull-up and schmitt-triggered input; remains pulled low during reset phase and returns to pull-up after internal reset release.
2 PA1/OSC_IN bidirectional Port A pin 1; can operate as general purpose I/O with floating input and push-pull output at slow speed (≤2 MHz), or as oscillator resonator/crystal input.
3 PA2/OSC_OUT bidirectional Port A pin 2; can operate as general purpose I/O with floating input and push-pull output at slow speed (≤2 MHz), or as oscillator resonator/crystal output.
4 VSS power_in Digital ground reference for digital logic circuits.
5 VCAP passive Capacitor connection for internal 1.8 V regulator; requires 1 µF external ceramic capacitor with ESR < 0.5 Ω.
6 VDD power_in Digital power supply pin; operating range 2.95 V to 5.5 V.
7 VDDIO_1 power_in I/O power supply rail for digital I/O pins; shall be connected to VDD or to the same supply rail.
8 PF4/AIN12 input Port F pin 4; functions as floating analog input for ADC channel 12 (not selectable in ADC scan mode or analog watchdog mode), or general purpose input.
9 VDDA power_in Analog power supply pin for ADC circuit; operating range typically 3.0 V to 5.5 V.
10 VSSA power_in Analog ground reference for ADC and analog circuits.
11 PB5/AIN5 bidirectional Port B pin 5; can operate as floating analog input for ADC channel 5, general purpose I/O with slow speed (≤2 MHz), or I2C_SDA with open-drain output (remappable via AFR6).
12 PB4/AIN4 bidirectional Port B pin 4; can operate as floating analog input for ADC channel 4, general purpose I/O with slow speed (≤2 MHz), or I2C_SCL with open-drain output (remappable via AFR6).
13 PB3/AIN3 bidirectional Port B pin 3; can operate as floating analog input for ADC channel 3 or general purpose I/O with slow speed (≤2 MHz); alternate function TIM1_ETR available via AFR5 remapping.
14 PB2/AIN2 bidirectional Port B pin 2; can operate as floating analog input for ADC channel 2 or general purpose I/O with slow speed (≤2 MHz); alternate function TIM1_CH3N available via AFR5 remapping.
15 PB1/AIN1 bidirectional Port B pin 1; can operate as floating analog input for ADC channel 1 or general purpose I/O with slow speed (≤2 MHz); alternate function TIM1_CH2N available via AFR5 remapping.
16 PB0/AIN0 bidirectional Port B pin 0; can operate as floating analog input for ADC channel 0 or general purpose I/O with slow speed (≤2 MHz); alternate function TIM1_CH1N available via AFR5 remapping.
17 PE5/SPI_NSS bidirectional Port E pin 5; functions as SPI master/slave chip select signal or general purpose I/O with slow output speed (≤2 MHz) and push-pull output.
18 PC1/TIM1_CH1/UART2_CK output Port C pin 1; functions as Timer 1 channel 1 output, UART2 synchronous clock output, or high-sink general purpose I/O with fast/slow programmable speed (default slow).
19 PC2/TIM1_CH2 output Port C pin 2; functions as Timer 1 channel 2 output or high-sink general purpose I/O with fast/slow programmable speed (default slow).
20 PC3/TIM1_CH3 output Port C pin 3; functions as Timer 1 channel 3 output or high-sink general purpose I/O with fast/slow programmable speed (default slow).
21 PC4/TIM1_CH4 output Port C pin 4; functions as Timer 1 channel 4 output or high-sink general purpose I/O with fast/slow programmable speed (default slow).
22 PC5/SPI_SCK output Port C pin 5; functions as SPI serial clock output or high-sink general purpose I/O with fast/slow programmable speed (default slow).
23 PC6/SPI_MOSI output Port C pin 6; functions as SPI master out/slave in data output or high-sink general purpose I/O with fast/slow programmable speed (default slow).
24 PC7/SPI_MISO input Port C pin 7; functions as SPI master in/slave out data input or high-sink general purpose I/O with fast/slow programmable speed (default slow).
25 PD0/TIM3_CH2 output Port D pin 0; functions as Timer 3 channel 2 output with high-sink capability or fast/slow programmable output speed (default slow); alternate functions include CLK_CCO (AFR2) or TIM1_BKIN (AFR3).
26 PD1/SWIM bidirectional Port D pin 1; functions as SWIM (Single Wire Interface Module) data interface with internal weak pull-up during reset phase and fast programmable output speed (default fast), or general purpose I/O with external interrupt capability.
27 PD2/TIM3_CH1 output Port D pin 2; functions as Timer 3 channel 1 output with high-sink capability or fast/slow programmable output speed (default slow); alternate function TIM2_CH3 available via AFR1 remapping.
28 PD3/TIM2_CH2 output Port D pin 3; functions as Timer 2 channel 2 output with high-sink capability or fast/slow programmable output speed (default slow); alternate function ADC_ETR available via AFR0 remapping.
29 PD4/TIM2_CH1 output Port D pin 4; functions as Timer 2 channel 1 output with high-sink capability or fast/slow programmable output speed (default slow); alternate function BEEP output available via AFR7 remapping.
30 PD5/UART2_TX output Port D pin 5; functions as UART2 transmit data output or general purpose I/O with slow output speed (≤2 MHz) and push-pull output.
31 PD6/UART2_RX input Port D pin 6; functions as UART2 receive data input or general purpose input with slow input speed (≤2 MHz) and floating input configuration.
32 PD7/TLI input Port D pin 7; functions as top-level interrupt input or general purpose I/O with slow speed (≤2 MHz); alternate function TIM1_CH4 available via AFR4 remapping.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-32(7x7)
Category Embedded Processors & Controllers
Pins 32

CAD (KiCad official)

  • Symbol: STM8S105K4T6CTR
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm8s105k4t6ctr-etched.step / stm8s105k4t6ctr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm8s105k4t6ctr.step / stm8s105k4t6ctr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (121 pp, sha256 b1007bc27bb78327, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF