# STM8S105C4T6TR

**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM8S105C4T6TR from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NRST | bidirectional | Reset pin, listed in the pin table as type I/O with main function Reset, and its reset state is shown as X. |
| 2 | PA1/OSCIN | bidirectional | Port A1 pin that doubles as the resonator/crystal input OSCIN, with slow output speed O1 (up to 2 MHz). |
| 3 | PA2/OSCOUT | bidirectional | Port A2 pin that doubles as the resonator/crystal output OSCOUT, with slow output speed O1 (up to 2 MHz). |
| 4 | VSSIO_1 | power_in | I/O ground. |
| 5 | VSS | power_in | Digital ground. |
| 6 | VCAP | power_out | 1.8 V regulator capacitor pin; an external VCAP capacitor is connected here (see section 10.3.1). |
| 7 | VDD | power_in | Digital power supply; the device operates from 2.95 V to 5.5 V. |
| 8 | VDDIO_1 | power_in | I/O power supply. |
| 9 | PA3/TIM2_CH3 | bidirectional | Port A3 pin with default alternate function Timer 2 channel 3; TIM3_CH1 is available here when alternate function remap option AFR1 is set. |
| 10 | PA4 | bidirectional | Port A4 pin with high sink capability and output speed O3 (fast/slow programmable, slow after reset). |
| 11 | PA5 | bidirectional | Port A5 pin with high sink capability and output speed O3 (fast/slow programmable, slow after reset). |
| 12 | PA6 | bidirectional | Port A6 pin with high sink capability and output speed O3 (fast/slow programmable, slow after reset). |
| 13 | VDDA | power_in | Analog power supply. |
| 14 | VSSA | power_in | Analog ground. |
| 15 | PB7/AIN7 | bidirectional | Port B7 pin that doubles as ADC analog input 7. |
| 16 | PB6/AIN6 | bidirectional | Port B6 pin that doubles as ADC analog input 6. |
| 17 | PB5/AIN5 | bidirectional | Port B5 pin that doubles as ADC analog input 5; I2C_SDA is available here when remap option AFR6 is set. |
| 18 | PB4/AIN4 | bidirectional | Port B4 pin that doubles as ADC analog input 4; I2C_SCL is available here when remap option AFR6 is set. |
| 19 | PB3/AIN3 | bidirectional | Port B3 pin that doubles as ADC analog input 3; TIM1_ETR is available here when remap option AFR5 is set. |
| 20 | PB2/AIN2 | bidirectional | Port B2 pin that doubles as ADC analog input 2; TIM1_CH3N is available here when remap option AFR5 is set. |
| 21 | PB1/AIN1 | bidirectional | Port B1 pin that doubles as ADC analog input 1; TIM1_CH2N is available here when remap option AFR5 is set. |
| 22 | PB0/AIN0 | bidirectional | Port B0 pin that doubles as ADC analog input 0; TIM1_CH1N is available here when remap option AFR5 is set. |
| 23 | PE7/AIN8 | bidirectional | Port E7 pin that doubles as ADC analog input 8. |
| 24 | PE6/AIN9 | bidirectional | Port E6 pin that doubles as ADC analog input 9. |
| 25 | PE5/SPI_NSS | bidirectional | Port E5 pin with SPI master/slave select function (SPI_NSS). |
| 26 | PC1/TIM1_CH1/UART2_CK | bidirectional | Port C1 pin with Timer 1 channel 1 and UART2 synchronous clock (UART2_CK) functions, high sink capability, and output speed O3. |
| 27 | PC2/TIM1_CH2 | bidirectional | Port C2 pin with Timer 1 channel 2 function, high sink capability, and output speed O3. |
| 28 | PC3/TIM1_CH3 | bidirectional | Port C3 pin with Timer 1 channel 3 function, high sink capability, and output speed O3. |
| 29 | PC4/TIM1_CH4 | bidirectional | Port C4 pin with Timer 1 channel 4 function, high sink capability, and output speed O3. |
| 30 | PC5/SPI_SCK | bidirectional | Port C5 pin with SPI clock (SPI_SCK) function, high sink capability, and output speed O3. |
| 31 | VSSIO_2 | power_in | I/O ground. |
| 32 | VDDIO_2 | power_in | I/O power supply. |
| 33 | PC6/SPI_MOSI | bidirectional | Port C6 pin with SPI master out/slave in (SPI_MOSI) function, high sink capability, and output speed O3. |
| 34 | PC7/SPI_MISO | bidirectional | Port C7 pin with SPI master in/slave out (SPI_MISO) function, high sink capability, and output speed O3. |
| 35 | PG0 | bidirectional | Port G0 general-purpose I/O with output speed O1 (up to 2 MHz). |
| 36 | PG1 | bidirectional | Port G1 general-purpose I/O with output speed O1 (up to 2 MHz). |
| 37 | PE3/TIM1_BKIN | bidirectional | Port E3 pin with Timer 1 break input (TIM1_BKIN) function. |
| 38 | PE2/I2C_SDA | bidirectional | Port E2 pin with I2C data (I2C_SDA) function; it is a true open-drain I/O (no P-buffer, weak pull-up or protection diode to VDD). |
| 39 | PE1/I2C_SCL | bidirectional | Port E1 pin with I2C clock (I2C_SCL) function; it is a true open-drain I/O (no P-buffer, weak pull-up or protection diode to VDD). |
| 40 | PE0/CLK_CCO | bidirectional | Port E0 pin with configurable clock output (CLK_CCO) function, high sink capability, and output speed O3. |
| 41 | PD0/TIM3_CH2 | bidirectional | Port D0 pin with Timer 3 channel 2 function, high sink capability; TIM1_BKIN (AFR3) and CLK_CCO (AFR2) are available here as remapped alternate functions. |
| 42 | PD1/SWIM | bidirectional | Port D1 pin with SWIM single-wire debug interface data function; it is in input pull-up during reset and after internal reset release, with high sink capability. |
| 43 | PD2/TIM3_CH1 | bidirectional | Port D2 pin with Timer 3 channel 1 function, high sink capability; TIM2_CH3 (AFR1) is available here as a remapped alternate function. |
| 44 | PD3/TIM2_CH2 | bidirectional | Port D3 pin with Timer 2 channel 2 function, high sink capability; ADC_ETR (AFR0) is available here as a remapped alternate function. |
| 45 | PD4/TIM2_CH1 | bidirectional | Port D4 pin with Timer 2 channel 1 function, high sink capability; BEEP output (AFR7) is available here as a remapped alternate function. |
| 46 | PD5/UART2_TX | bidirectional | Port D5 pin with UART2 data transmit (UART2_TX) function and output speed O1 (up to 2 MHz). |
| 47 | PD6/UART2_RX | bidirectional | Port D6 pin with UART2 data receive (UART2_RX) function and output speed O1 (up to 2 MHz). |
| 48 | PD7/TLI | bidirectional | Port D7 pin with top level interrupt (TLI) function; TIM1_CH4 (AFR4) is available here as a remapped alternate function. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |

## CAD (KiCad official)

- Symbol: `STM8S105C4T6TR`
- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`
- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `stm8s105c4t6tr-etched.step` / `stm8s105c4t6tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm8s105c4t6tr.step` / `stm8s105c4t6tr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586175923666497536) (121 pp, sha256 `b1007bc27bb78327`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm8s105c4t6tr-datasheet.pdf)