component
STM8S103K3T3C
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"type": "component",
"description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"stm8s103k3t3c",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
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"path": "docs/hero.png"
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"stm8s103k3t3c.kicad_mod",
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"stm8s103k3t3c.step",
"stm8s103k3t3c.lbr",
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"docs/stm8s103k3t3c-datasheet.pdf",
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"component": {
"mpn": "STM8S103K3T3C",
"manufacturer": "STMicroelectronics",
"package": "LQFP-32(7x7)",
"pin_count": 32,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922134751531008",
"parts": {
"symbol": "stm8s103k3t3c.kicad_sym",
"footprint": "stm8s103k3t3c.kicad_mod",
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"model_3d_step": "stm8s103k3t3c-etched.step",
"model_3d_step_plain": "stm8s103k3t3c.step",
"lbr": "stm8s103k3t3c.lbr"
},
"distributor_links": {
"lcsc": "C1338253",
"digikey": "497-11580-ND",
"mouser": "511-STM8S103K3T3C"
},
"distributor_check": {
"checked_at": "2026-10-07T21:48:27Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "497-11580-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "511-STM8S103K3T3C",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "NRST",
"type": "bidirectional",
"description": "Reset pin (I/O, weak pull-up) used for the device reset; its characteristics are given in the NRST pin characteristics table (Table 42)."
},
{
"number": "2",
"name": "PA1/OSCIN",
"type": "bidirectional",
"description": "Port A1 is also the resonator/crystal input OSCIN, and in Halt/Active-halt it is forced to input weak pull-up and cannot wake the device, so it should be used only as an input if Halt/Active-halt is used."
},
{
"number": "3",
"name": "PA2/OSCOUT",
"type": "bidirectional",
"description": "Port A2 is also the resonator/crystal output OSCOUT (slow O1 output speed, with weak pull-up and push-pull/open-drain options)."
},
{
"number": "4",
"name": "VSS",
"type": "power_in",
"description": "Digital ground."
},
{
"number": "5",
"name": "VCAP",
"type": "passive",
"description": "Connection for the 1.8 V regulator capacitor, whose external VCAP specification is given in Section 10.3.1."
},
{
"number": "6",
"name": "VDD",
"type": "power_in",
"description": "Digital power supply, specified for 2.95 to 5.5 V operation."
},
{
"number": "7",
"name": "PA3/TIM2_CH3 [SPI_NSS]",
"type": "bidirectional",
"description": "Port A3 with default Timer 2 channel 3 function, high sink capable, and SPI master/slave select available only when remapped via AFR1."
},
{
"number": "8",
"name": "PF4",
"type": "bidirectional",
"description": "Port F4 general-purpose I/O with slow output speed (O1), floating/weak pull-up input options and push-pull output."
},
{
"number": "9",
"name": "PB7",
"type": "bidirectional",
"description": "Port B7 general-purpose I/O with slow output speed (O1), floating/weak pull-up input options and push-pull output."
},
{
"number": "10",
"name": "PB6",
"type": "bidirectional",
"description": "Port B6 general-purpose I/O with slow output speed (O1), floating/weak pull-up input options and push-pull output."
},
{
"number": "11",
"name": "PB5/I2C_SDA",
"type": "bidirectional",
"description": "Port B5 with I2C data line as a true open-drain I/O (P-buffer, weak pull-up and protection diode to VDD not implemented)."
},
{
"number": "12",
"name": "PB4/I2C_SCL",
"type": "bidirectional",
"description": "Port B4 with I2C clock line as a true open-drain I/O (P-buffer, weak pull-up and protection diode to VDD not implemented)."
},
{
"number": "13",
"name": "PB3/AIN3/TIM1_ETR",
"type": "bidirectional",
"description": "Port B3 with analog input 3 and Timer 1 external trigger, high sink capable with programmable speed (O3)."
},
{
"number": "14",
"name": "PB2/AIN2/TIM1_CH3N",
"type": "bidirectional",
"description": "Port B2 with analog input 2 and Timer 1 inverted channel 3, high sink capable with programmable speed (O3)."
},
{
"number": "15",
"name": "PB1/AIN1/TIM1_CH2N",
"type": "bidirectional",
"description": "Port B1 with analog input 1 and Timer 1 inverted channel 2, high sink capable with programmable speed (O3)."
},
{
"number": "16",
"name": "PB0/AIN0/TIM1_CH1N",
"type": "bidirectional",
"description": "Port B0 with analog input 0 and Timer 1 inverted channel 1, high sink capable with programmable speed (O3)."
},
{
"number": "17",
"name": "PE5/SPI_NSS",
"type": "bidirectional",
"description": "Port E5 with SPI master/slave select, high sink capable with programmable speed (O3)."
},
{
"number": "18",
"name": "PC1/TIM1_CH1/UART1_CK",
"type": "bidirectional",
"description": "Port C1 with Timer 1 channel 1 and UART1 clock, high sink capable with programmable speed (O3)."
},
{
"number": "19",
"name": "PC2/TIM1_CH2",
"type": "bidirectional",
"description": "Port C2 with Timer 1 channel 2, high sink capable with programmable speed (O3)."
},
{
"number": "20",
"name": "PC3/TIM1_CH3",
"type": "bidirectional",
"description": "Port C3 with Timer 1 channel 3, high sink capable with programmable speed (O3)."
},
{
"number": "21",
"name": "PC4/TIM1_CH4/CLK_CCO",
"type": "bidirectional",
"description": "Port C4 with Timer 1 channel 4 or configurable clock output, high sink capable with programmable speed (O3)."
},
{
"number": "22",
"name": "PC5/SPI_SCK",
"type": "bidirectional",
"description": "Port C5 with SPI clock, high sink capable with programmable speed (O3)."
},
{
"number": "23",
"name": "PC6/SPI_MOSI",
"type": "bidirectional",
"description": "Port C6 with SPI master out / slave in, high sink capable with programmable speed (O3)."
},
{
"number": "24",
"name": "PC7/SPI_MISO",
"type": "bidirectional",
"description": "Port C7 with SPI master in / slave out, high sink capable with programmable speed (O3)."
},
{
"number": "25",
"name": "PD0/TIM1_BKIN [CLK_CCO]",
"type": "bidirectional",
"description": "Port D0 with Timer 1 break input, and configurable clock output available when remapped via AFR5; high sink capable."
},
{
"number": "26",
"name": "PD1/SWIM",
"type": "bidirectional",
"description": "SWIM single-wire data interface, with input pull-up during reset phase and after internal reset release; high sink capable with fast/slow programmable speed (O4)."
},
{
"number": "27",
"name": "PD2 [TIM2_CH3]",
"type": "bidirectional",
"description": "Port D2 general-purpose I/O, high sink capable; Timer 2 channel 3 is available only when remapped via AFR1."
},
{
"number": "28",
"name": "PD3/TIM2_CH2/ADC_ETR",
"type": "bidirectional",
"description": "Port D3 with Timer 2 channel 2 and ADC external trigger, high sink capable with programmable speed (O3)."
},
{
"number": "29",
"name": "PD4/BEEP/TIM2_CH1",
"type": "bidirectional",
"description": "Port D4 with Timer 2 channel 1 and BEEP output, high sink capable with programmable speed (O3)."
},
{
"number": "30",
"name": "PD5/UART1_TX",
"type": "bidirectional",
"description": "Port D5 with UART1 data transmit, high sink capable with programmable speed (O3)."
},
{
"number": "31",
"name": "PD6/UART1_RX",
"type": "bidirectional",
"description": "Port D6 with UART1 data receive, high sink capable with programmable speed (O3)."
},
{
"number": "32",
"name": "PD7/TLI [TIM1_CH4]",
"type": "bidirectional",
"description": "Port D7 with top level interrupt (TLI) input; Timer 1 channel 4 is available only when remapped via AFR6; high sink capable."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Datasheet classifies VCAP only as power type 'S' with the note '1.8 V regulator capacitor'; it does ; Datasheet lists NRST as type I/O with weak pull-up and no explicit input/output direction limits in ; Port pins are typed bidirectional (datasheet type 'I/O'). Alternate-function names in square bracket"
],
"pages_sent": 57,
"cost_usd": 0.2266,
"at": "2026-10-07T21:48:06"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922134751531008",
"pages": 121,
"sha256": "ac23789ac0a2f408",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 32,
"described": 32,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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}