component
STM8S007C8T6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "stm8s007c8t6tr",
"version": "0.1.0",
"type": "component",
"description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"stm8s007c8t6tr",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
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"stm8s007c8t6tr.step",
"stm8s007c8t6tr.lbr",
"docs/hero.png",
"docs/stm8s007c8t6tr-datasheet.pdf",
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"viewers/footprint.html",
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"stm8s007c8t6tr-hero.overlay.json",
"stm8s007c8t6tr-etched.glb"
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"component": {
"mpn": "STM8S007C8T6TR",
"manufacturer": "STMicroelectronics",
"package": "LQFP-48(7x7)",
"pin_count": 48,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://www.st.com/resource/en/datasheet/stm8s007c8t6tr.pdf",
"parts": {
"symbol": "stm8s007c8t6tr.kicad_sym",
"footprint": "stm8s007c8t6tr.kicad_mod",
"model_3d": "stm8s007c8t6tr-hero.glb",
"model_3d_plain": "stm8s007c8t6tr-etched.glb",
"model_3d_step": "stm8s007c8t6tr-etched.step",
"model_3d_step_plain": "stm8s007c8t6tr.step",
"lbr": "stm8s007c8t6tr.lbr"
},
"distributor_links": {
"lcsc": "C2053227",
"digikey": "497-18848-2-ND",
"mouser": "511-STM8S007C8T6TR"
},
"distributor_check": {
"checked_at": "2026-11-05T23:53:33Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "497-18848-2-ND",
"status": "found"
},
"mouser": {
"pn": "511-STM8S007C8T6TR",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "NRST",
"type": "bidirectional",
"description": "Active-low reset pin; its electrical limits are given in the NRST pin characteristics table (Table 39)."
},
{
"number": "2",
"name": "PA1/OSCIN",
"type": "bidirectional",
"description": "Port A1 multiplexed with the resonator/crystal oscillator input, with speed option O1 (up to 2 MHz)."
},
{
"number": "3",
"name": "PA2/OSCOUT",
"type": "bidirectional",
"description": "Port A2 multiplexed with the resonator/crystal oscillator output, with speed option O1 (up to 2 MHz)."
},
{
"number": "4",
"name": "VSSIO_1",
"type": "power_in",
"description": "I/O ground connection for the first group of I/O pins."
},
{
"number": "5",
"name": "VSS",
"type": "power_in",
"description": "Digital ground connection."
},
{
"number": "6",
"name": "VCAP",
"type": "passive",
"description": "Connection for the 1.8 V regulator external capacitor, whose requirements are given in section 9.3.1."
},
{
"number": "7",
"name": "VDD",
"type": "power_in",
"description": "Digital power supply, operating from 2.95 V to 5.5 V."
},
{
"number": "8",
"name": "VDDIO_1",
"type": "power_in",
"description": "I/O power supply for the first group of I/O pins."
},
{
"number": "9",
"name": "PA3/TIM2_CH3",
"type": "bidirectional",
"description": "Port A3 with TIM2 channel 3 as default alternate function, and TIM3_CH1 available when the AFR1 remap option is active."
},
{
"number": "10",
"name": "PA4/UART1_RX",
"type": "bidirectional",
"description": "Port A4 with UART1 receive, high sink capable; its default state is controlled by the ROM bootloader and it returns to floating before bootloader exit."
},
{
"number": "11",
"name": "PA5/UART1_TX",
"type": "bidirectional",
"description": "Port A5 with UART1 transmit, high sink capable."
},
{
"number": "12",
"name": "PA6/UART1_CK",
"type": "bidirectional",
"description": "Port A6 with UART1 synchronous clock, high sink capable."
},
{
"number": "13",
"name": "VDDA",
"type": "power_in",
"description": "Analog power supply for the ADC."
},
{
"number": "14",
"name": "VSSA",
"type": "power_in",
"description": "Analog ground for the ADC."
},
{
"number": "15",
"name": "PB7/AIN7",
"type": "bidirectional",
"description": "Port B7 with analog input 7 of the 10-bit ADC."
},
{
"number": "16",
"name": "PB6/AIN6",
"type": "bidirectional",
"description": "Port B6 with analog input 6 of the 10-bit ADC."
},
{
"number": "17",
"name": "PB5/AIN5",
"type": "bidirectional",
"description": "Port B5 with analog input 5 of the 10-bit ADC, and I2C_SDA available after the AFR6 remap option."
},
{
"number": "18",
"name": "PB4/AIN4",
"type": "bidirectional",
"description": "Port B4 with analog input 4 of the 10-bit ADC, and I2C_SCL available after the AFR6 remap option."
},
{
"number": "19",
"name": "PB3/AIN3",
"type": "bidirectional",
"description": "Port B3 with analog input 3 of the 10-bit ADC, and TIM1_ETR available after the AFR5 remap option."
},
{
"number": "20",
"name": "PB2/AIN2",
"type": "bidirectional",
"description": "Port B2 with analog input 2 of the 10-bit ADC, and TIM1_CH3N available after the AFR5 remap option."
},
{
"number": "21",
"name": "PB1/AIN1",
"type": "bidirectional",
"description": "Port B1 with analog input 1 of the 10-bit ADC, and TIM1_CH2N available after the AFR5 remap option."
},
{
"number": "22",
"name": "PB0/AIN0",
"type": "bidirectional",
"description": "Port B0 with analog input 0 of the 10-bit ADC, and TIM1_CH1N available after the AFR5 remap option."
},
{
"number": "23",
"name": "PE7/AIN8",
"type": "bidirectional",
"description": "Port E7 with analog input 8 of the 10-bit ADC."
},
{
"number": "24",
"name": "PE6/AIN9",
"type": "bidirectional",
"description": "Port E6 with analog input 9 of the 10-bit ADC."
},
{
"number": "25",
"name": "PE5/SPI_NSS",
"type": "bidirectional",
"description": "Port E5 with SPI master/slave select function."
},
{
"number": "26",
"name": "PC1/TIM1_CH1",
"type": "bidirectional",
"description": "Port C1 with TIM1 channel 1, high sink capable."
},
{
"number": "27",
"name": "PC2/TIM1_CH2",
"type": "bidirectional",
"description": "Port C2 with TIM1 channel 2, high sink capable."
},
{
"number": "28",
"name": "PC3/TIM1_CH3",
"type": "bidirectional",
"description": "Port C3 with TIM1 channel 3, high sink capable."
},
{
"number": "29",
"name": "PC4/TIM1_CH4",
"type": "bidirectional",
"description": "Port C4 with TIM1 channel 4, high sink capable."
},
{
"number": "30",
"name": "PC5/SPI_SCK",
"type": "bidirectional",
"description": "Port C5 with SPI clock, high sink capable."
},
{
"number": "31",
"name": "VSSIO_2",
"type": "power_in",
"description": "I/O ground connection for the second group of I/O pins."
},
{
"number": "32",
"name": "VDDIO_2",
"type": "power_in",
"description": "I/O power supply for the second group of I/O pins."
},
{
"number": "33",
"name": "PC6/SPI_MOSI",
"type": "bidirectional",
"description": "Port C6 with SPI master out / slave in, high sink capable."
},
{
"number": "34",
"name": "PC7/SPI_MISO",
"type": "bidirectional",
"description": "Port C7 with SPI master in / slave out, high sink capable."
},
{
"number": "35",
"name": "PG0",
"type": "bidirectional",
"description": "Port G0 general-purpose I/O with speed option O1 (up to 2 MHz)."
},
{
"number": "36",
"name": "PG1",
"type": "bidirectional",
"description": "Port G1 general-purpose I/O with speed option O1 (up to 2 MHz)."
},
{
"number": "37",
"name": "PE3/TIM1_BKIN",
"type": "bidirectional",
"description": "Port E3 with TIM1 break input."
},
{
"number": "38",
"name": "PE2/I2C_SDA",
"type": "bidirectional",
"description": "Port E2 with I2C data as a true open-drain pin (no protection diode to VDD), limited to 2 MHz slope."
},
{
"number": "39",
"name": "PE1/I2C_SCL",
"type": "bidirectional",
"description": "Port E1 with I2C clock as a true open-drain pin (no protection diode to VDD), limited to 2 MHz slope."
},
{
"number": "40",
"name": "PE0/CLK_CCO",
"type": "bidirectional",
"description": "Port E0 with configurable clock output, high sink capable."
},
{
"number": "41",
"name": "PD0/TIM3_CH2",
"type": "bidirectional",
"description": "Port D0 with TIM3 channel 2 and high sink capability; TIM1_BKIN and CLK_CCO are available via AFR3 and AFR2 remap options."
},
{
"number": "42",
"name": "PD1/SWIM",
"type": "bidirectional",
"description": "Port D1 with the SWIM single-wire debug data interface, high sink capable and in input pull-up during and after reset."
},
{
"number": "43",
"name": "PD2/TIM3_CH1",
"type": "bidirectional",
"description": "Port D2 with TIM3 channel 1, high sink capable; TIM2_CH3 is available via the AFR1 remap option."
},
{
"number": "44",
"name": "PD3/TIM2_CH2",
"type": "bidirectional",
"description": "Port D3 with TIM2 channel 2, high sink capable; ADC_ETR is available via the AFR0 remap option."
},
{
"number": "45",
"name": "PD4/TIM2_CH1/BEEP",
"type": "bidirectional",
"description": "Port D4 with TIM2 channel 1, high sink capable; BEEP output is available via the AFR7 remap option."
},
{
"number": "46",
"name": "PD5/UART3_TX",
"type": "bidirectional",
"description": "Port D5 with UART3 data transmit."
},
{
"number": "47",
"name": "PD6/UART3_RX",
"type": "bidirectional",
"description": "Port D6 with UART3 data receive; its default state is controlled by the ROM bootloader and it returns to floating before bootloader exit."
},
{
"number": "48",
"name": "PD7/TLI",
"type": "bidirectional",
"description": "Port D7 with top level interrupt input."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [],
"pages_sent": 28,
"cost_usd": 0.0466,
"at": "2026-11-05T23:53:20"
},
"datasheet": {
"url": "https://www.st.com/resource/en/datasheet/stm8s007c8t6tr.pdf",
"pages": 93,
"sha256": "41316b954b059f1b",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 48,
"described": 48,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
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"models_3d": [
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"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
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"footprint_binding": "identity",
"sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",
"checked": "2026-11-05",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
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"footprint_binding": "identity",
"sha256": "1703e730da3b4c9296019b8e7a29654d60254607c789ee2b1472a5e45df43250",
"checked": "2026-11-05",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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}