component
STM8S005K6T6CTR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Also listed as STM8S005K6T6C
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STM8S005K6T6CTR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)
STM8S005K6T6CTR from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NRST | input | Reset input pin with internal weak pull-up (30-80 kΩ), slow speed (O1 ≤2 MHz), filtered pulse width ≤75 ns. |
| 2 | PA1/OSCIN | input | Port A bit 1 / high-speed external crystal oscillator input (1-16 MHz) with leakage current ±1 µA. |
| 3 | PA2/OSCOUT | output | Port A bit 2 / high-speed external crystal oscillator output (1-16 MHz), slow speed (O1 ≤2 MHz). |
| 4 | VSS | power_in | Digital ground reference pin, must be connected to external power supply. |
| 5 | VCAP | passive | External capacitor connection (470 nF to 3.3 µF, ESR ≤0.3 Ω, ESL <15 nH) for 1.8 V internal voltage regulator stabilization. |
| 6 | VDD | power_in | Digital power supply pin (2.95-5.5 V), must be connected to external power supply. |
| 7 | VDDIO | power_in | I/O power supply pin (2.95-5.5 V) for input/output port voltage reference. |
| 8 | PF4/AIN12 | bidirectional | Port F bit 4 / analog input channel 12 (0-VDDA), 10-bit ADC conversion, not selectable in scan mode or watchdog. |
| 9 | VDDA | power_in | Analog power supply pin (2.75-VDDA V), must be connected to external power supply for ADC. |
| 10 | VSSA | power_in | Analog ground reference pin for ADC, must be connected to external ground. |
| 11 | PB5/AIN5 | bidirectional | Port B bit 5 / analog input channel 5 (0-VDDA), I2C SDA alternate function (AFR6), slow speed (O1 ≤2 MHz). |
| 12 | PB4/AIN4 | bidirectional | Port B bit 4 / analog input channel 4 (0-VDDA), I2C SCL alternate function (AFR6), slow speed (O1 ≤2 MHz). |
| 13 | PB3/AIN3 | bidirectional | Port B bit 3 / analog input channel 3 (0-VDDA), TIM1 external trigger alternate function (AFR5), slow speed (O1 ≤2 MHz). |
| 14 | PB2/AIN2 | bidirectional | Port B bit 2 / analog input channel 2 (0-VDDA), TIM1 CH3N complementary output alternate function (AFR5), slow speed (O1 ≤2 MHz). |
| 15 | PB1/AIN1 | bidirectional | Port B bit 1 / analog input channel 1 (0-VDDA), TIM1 CH2N complementary output alternate function (AFR5), slow speed (O1 ≤2 MHz). |
| 16 | PB0/AIN0 | bidirectional | Port B bit 0 / analog input channel 0 (0-VDDA), TIM1 CH1N complementary output alternate function (AFR5), slow speed (O1 ≤2 MHz). |
| 17 | PE5/SPI_NSS | bidirectional | Port E bit 5 / SPI master/slave select (NSS) chip select pin, slow speed (O1 ≤2 MHz). |
| 18 | PC1/TIM1_CH1/UART2_CK | bidirectional | Port C bit 1 / TIM1 channel 1 PWM/capture output / UART2 synchronous clock, high sink (16 mA), fast/slow programmable (O3). |
| 19 | PC2/TIM1_CH2 | bidirectional | Port C bit 2 / TIM1 channel 2 PWM/capture output, high sink (16 mA), fast/slow programmable (O3). |
| 20 | PC3/TIM1_CH3 | bidirectional | Port C bit 3 / TIM1 channel 3 PWM/capture output, high sink (16 mA), fast/slow programmable (O3). |
| 21 | PC4/TIM1_CH4 | bidirectional | Port C bit 4 / TIM1 channel 4 PWM/capture output, high sink (16 mA), fast/slow programmable (O3). |
| 22 | PC5/SPI_SCK | bidirectional | Port C bit 5 / SPI clock (SCK) pin, high sink (16 mA), fast/slow programmable (O3). |
| 23 | PC6/SPI_MOSI | bidirectional | Port C bit 6 / SPI master out/slave in (MOSI) data pin, high sink (16 mA), fast/slow programmable (O3). |
| 24 | PC7/SPI_MISO | bidirectional | Port C bit 7 / SPI master in/slave out (MISO) data pin, high sink (16 mA), fast/slow programmable (O3). |
| 25 | PD0/TIM3_CH2 | bidirectional | Port D bit 0 / TIM3 channel 2 PWM/capture, TIM1 break input (AFR3) or configurable clock output (AFR2) alternate functions, high sink, fast/slow programmable (O3). |
| 26 | PD1/SWIM | bidirectional | Port D bit 1 / SWIM single-wire debug/programming interface data pin with internal pull-up after reset, high sink, fast/slow programmable default fast (O4). |
| 27 | PD2/TIM3_CH1 | bidirectional | Port D bit 2 / TIM3 channel 1 PWM/capture output, TIM2 channel 3 alternate function (AFR1), high sink, fast/slow programmable (O3). |
| 28 | PD3/TIM2_CH2 | bidirectional | Port D bit 3 / TIM2 channel 2 PWM/capture output, ADC external trigger alternate function (AFR0), high sink, fast/slow programmable (O3). |
| 29 | PD4/TIM2_CH1 | bidirectional | Port D bit 4 / TIM2 channel 1 PWM/capture output, beeper output alternate function (AFR7) 1-4 kHz, high sink, fast/slow programmable (O3). |
| 30 | PD5/UART2_TX | bidirectional | Port D bit 5 / UART2 data transmit (TX) pin, full duplex 1 Mbit/s SCI communication, slow speed (O1 ≤2 MHz). |
| 31 | PD6/UART2_RX | bidirectional | Port D bit 6 / UART2 data receive (RX) pin, full duplex 1 Mbit/s SCI communication, slow speed (O1 ≤2 MHz). |
| 32 | PD7/TLI | input | Port D bit 7 / top-level external interrupt input pin, TIM1 channel 4 alternate function (AFR4), slow speed (O1 ≤2 MHz). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
CAD (KiCad official)
- Symbol:
STM8S005K6T6CTR - Footprint:
Package_QFP:LQFP-32_7x7mm_P0.8mm - 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm8s005k6t6ctr-etched.step/stm8s005k6t6ctr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm8s005k6t6ctr.step/stm8s005k6t6ctr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (100 pp, sha256
9db816856b93bc4a, retrieved 2026-09-24, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STM8S005K6T6CTR
**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)
STM8S005K6T6CTR from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NRST | input | Reset input pin with internal weak pull-up (30-80 kΩ), slow speed (O1 ≤2 MHz), filtered pulse width ≤75 ns. |
| 2 | PA1/OSCIN | input | Port A bit 1 / high-speed external crystal oscillator input (1-16 MHz) with leakage current ±1 µA. |
| 3 | PA2/OSCOUT | output | Port A bit 2 / high-speed external crystal oscillator output (1-16 MHz), slow speed (O1 ≤2 MHz). |
| 4 | VSS | power_in | Digital ground reference pin, must be connected to external power supply. |
| 5 | VCAP | passive | External capacitor connection (470 nF to 3.3 µF, ESR ≤0.3 Ω, ESL <15 nH) for 1.8 V internal voltage regulator stabilization. |
| 6 | VDD | power_in | Digital power supply pin (2.95-5.5 V), must be connected to external power supply. |
| 7 | VDDIO | power_in | I/O power supply pin (2.95-5.5 V) for input/output port voltage reference. |
| 8 | PF4/AIN12 | bidirectional | Port F bit 4 / analog input channel 12 (0-VDDA), 10-bit ADC conversion, not selectable in scan mode or watchdog. |
| 9 | VDDA | power_in | Analog power supply pin (2.75-VDDA V), must be connected to external power supply for ADC. |
| 10 | VSSA | power_in | Analog ground reference pin for ADC, must be connected to external ground. |
| 11 | PB5/AIN5 | bidirectional | Port B bit 5 / analog input channel 5 (0-VDDA), I2C SDA alternate function (AFR6), slow speed (O1 ≤2 MHz). |
| 12 | PB4/AIN4 | bidirectional | Port B bit 4 / analog input channel 4 (0-VDDA), I2C SCL alternate function (AFR6), slow speed (O1 ≤2 MHz). |
| 13 | PB3/AIN3 | bidirectional | Port B bit 3 / analog input channel 3 (0-VDDA), TIM1 external trigger alternate function (AFR5), slow speed (O1 ≤2 MHz). |
| 14 | PB2/AIN2 | bidirectional | Port B bit 2 / analog input channel 2 (0-VDDA), TIM1 CH3N complementary output alternate function (AFR5), slow speed (O1 ≤2 MHz). |
| 15 | PB1/AIN1 | bidirectional | Port B bit 1 / analog input channel 1 (0-VDDA), TIM1 CH2N complementary output alternate function (AFR5), slow speed (O1 ≤2 MHz). |
| 16 | PB0/AIN0 | bidirectional | Port B bit 0 / analog input channel 0 (0-VDDA), TIM1 CH1N complementary output alternate function (AFR5), slow speed (O1 ≤2 MHz). |
| 17 | PE5/SPI_NSS | bidirectional | Port E bit 5 / SPI master/slave select (NSS) chip select pin, slow speed (O1 ≤2 MHz). |
| 18 | PC1/TIM1_CH1/UART2_CK | bidirectional | Port C bit 1 / TIM1 channel 1 PWM/capture output / UART2 synchronous clock, high sink (16 mA), fast/slow programmable (O3). |
| 19 | PC2/TIM1_CH2 | bidirectional | Port C bit 2 / TIM1 channel 2 PWM/capture output, high sink (16 mA), fast/slow programmable (O3). |
| 20 | PC3/TIM1_CH3 | bidirectional | Port C bit 3 / TIM1 channel 3 PWM/capture output, high sink (16 mA), fast/slow programmable (O3). |
| 21 | PC4/TIM1_CH4 | bidirectional | Port C bit 4 / TIM1 channel 4 PWM/capture output, high sink (16 mA), fast/slow programmable (O3). |
| 22 | PC5/SPI_SCK | bidirectional | Port C bit 5 / SPI clock (SCK) pin, high sink (16 mA), fast/slow programmable (O3). |
| 23 | PC6/SPI_MOSI | bidirectional | Port C bit 6 / SPI master out/slave in (MOSI) data pin, high sink (16 mA), fast/slow programmable (O3). |
| 24 | PC7/SPI_MISO | bidirectional | Port C bit 7 / SPI master in/slave out (MISO) data pin, high sink (16 mA), fast/slow programmable (O3). |
| 25 | PD0/TIM3_CH2 | bidirectional | Port D bit 0 / TIM3 channel 2 PWM/capture, TIM1 break input (AFR3) or configurable clock output (AFR2) alternate functions, high sink, fast/slow programmable (O3). |
| 26 | PD1/SWIM | bidirectional | Port D bit 1 / SWIM single-wire debug/programming interface data pin with internal pull-up after reset, high sink, fast/slow programmable default fast (O4). |
| 27 | PD2/TIM3_CH1 | bidirectional | Port D bit 2 / TIM3 channel 1 PWM/capture output, TIM2 channel 3 alternate function (AFR1), high sink, fast/slow programmable (O3). |
| 28 | PD3/TIM2_CH2 | bidirectional | Port D bit 3 / TIM2 channel 2 PWM/capture output, ADC external trigger alternate function (AFR0), high sink, fast/slow programmable (O3). |
| 29 | PD4/TIM2_CH1 | bidirectional | Port D bit 4 / TIM2 channel 1 PWM/capture output, beeper output alternate function (AFR7) 1-4 kHz, high sink, fast/slow programmable (O3). |
| 30 | PD5/UART2_TX | bidirectional | Port D bit 5 / UART2 data transmit (TX) pin, full duplex 1 Mbit/s SCI communication, slow speed (O1 ≤2 MHz). |
| 31 | PD6/UART2_RX | bidirectional | Port D bit 6 / UART2 data receive (RX) pin, full duplex 1 Mbit/s SCI communication, slow speed (O1 ≤2 MHz). |
| 32 | PD7/TLI | input | Port D bit 7 / top-level external interrupt input pin, TIM1 channel 4 alternate function (AFR4), slow speed (O1 ≤2 MHz). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
## CAD (KiCad official)
- Symbol: `STM8S005K6T6CTR`
- Footprint: `Package_QFP:LQFP-32_7x7mm_P0.8mm`
- 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files: `stm8s005k6t6ctr-etched.step` / `stm8s005k6t6ctr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm8s005k6t6ctr.step` / `stm8s005k6t6ctr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589864427039461376) (100 pp, sha256 `9db816856b93bc4a`, retrieved 2026-09-24, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/stm8s005k6t6ctr-datasheet.pdf)