component

STM8L162M8T6

Public Made by Adom

by adom

STMicroelectronics Microcontroller Units (MCUs/MPUs/SOCs), LQFP-80(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrollerstm8l162m8t6factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

STM8L162M8T6

STMicroelectronics · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-80(14x14)

STM8L162M8T6 from STMicroelectronics, in a LQFP-80(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PH0/LCD_SEG36 bidirectional Port H0 five-volt tolerant high-sink I/O, alternate function LCD segment 36.
2 PH1/LCD_SEG37 bidirectional Port H1 five-volt tolerant high-sink I/O, alternate function LCD segment 37.
3 PH2/LCD_SEG38 bidirectional Port H2 five-volt tolerant high-sink I/O, alternate function LCD segment 38.
4 PH3/LCD_SEG39 bidirectional Port H3 five-volt tolerant high-sink I/O, alternate function LCD segment 39.
5 PA0/SWIM/BEEP/IR_TIM bidirectional Port A0 I/O in input pull-up after reset, with SWIM input/output, beep output, infrared timer output, [USART1_CK] remap and high-sink LED driver capability.
6 NRST/PA1 bidirectional Reset input with pull-up at power-up; can only be used as push-pull output PA1 for general purpose.
7 PA2/OSC_IN/[USART1_TX]/[SPI1_MISO] bidirectional Port A2 I/O, HSE oscillator input, with remappable USART1 transmit and SPI1 MISO.
8 PA3/OSC_OUT/[USART1_RX]/[SPI1_MOSI] bidirectional Port A3 I/O, HSE oscillator output, with remappable USART1 receive and SPI1 MOSI.
9 PA4/TIM2_BKIN/LCD_COM0/ADC1_IN2 bidirectional Port A4 five-volt tolerant I/O: Timer 2 break input, [Timer 2 trigger], LCD COM0, ADC1 input 2, [comparator 1 positive input].
10 PA5/TIM3_BKIN/LCD_COM1/ADC1_IN1 bidirectional Port A5 five-volt tolerant I/O: Timer 3 break input, [Timer 3 trigger], LCD COM1, ADC1 input 1, [comparator 1 positive input].
11 PA6/ADC1_TRIG/LCD_COM2/ADC1_IN0 bidirectional Port A6 five-volt tolerant I/O: ADC1 trigger, LCD COM2, ADC1 input 0, [comparator 1 positive input].
12 PA7/LCD_SEG0/TIM5_CH1 bidirectional Port A7 five-volt tolerant I/O: LCD segment 0, Timer 5 channel 1.
13 VSSA/VREF- power_in Analog ground voltage and ADC1 negative voltage reference.
14 VSS1 power_in I/O ground; must not be left unconnected.
15 VDD1 power_in Digital power supply, 1.65 to 3.6 V; must not be left unconnected.
16 VDDA power_in Analog supply voltage, 1.65 to 3.6 V (min 1.8 V when ADC or DAC is used); connect to VDD.
17 VREF+ power_in ADC1 and DAC1/2 positive voltage reference.
18 PG0/LCD_SEG28/USART3_RX bidirectional Port G0 five-volt tolerant I/O: LCD segment 28, USART3 receive, [Timer 2 break input].
19 PG1/LCD_SEG29/USART3_TX bidirectional Port G1 five-volt tolerant I/O: LCD segment 29, USART3 transmit, [Timer 3 break input].
20 PG2/LCD_SEG30/USART3_CK bidirectional Port G2 five-volt tolerant I/O: LCD segment 30, USART3 synchronous clock.
21 PG3/LCD_SEG31 bidirectional Port G3 five-volt tolerant I/O: LCD segment 31, [Timer 3 trigger].
22 VLCD passive LCD booster external capacitor pin (STM8L152/162 with LCD); reserved and tied to VDD on STM8L151.
23 PE0/LCD_SEG1/TIM5_CH2 bidirectional Port E0 five-volt tolerant I/O: LCD segment 1, Timer 5 channel 2.
24 PE1/TIM1_CH2N/LCD_SEG2 bidirectional Port E1 five-volt tolerant I/O: Timer 1 inverted channel 2, LCD segment 2.
25 PE2/TIM1_CH3N/LCD_SEG3 bidirectional Port E2 five-volt tolerant I/O: Timer 1 inverted channel 3, LCD segment 3, [configurable clock output].
26 PE3/LCD_SEG4 bidirectional Port E3 five-volt tolerant I/O: LCD segment 4.
27 PE4/LCD_SEG5/DAC_TRIG1 bidirectional Port E4 five-volt tolerant I/O: LCD segment 5, DAC 1 trigger.
28 PE5/LCD_SEG6/ADC1_IN23 bidirectional Port E5 five-volt tolerant I/O: LCD segment 6, ADC1 input 23, [comparator 1 and 2 positive inputs].
29 PD0/TIM3_CH2/LCD_SEG7/ADC1_IN22 bidirectional Port D0 five-volt tolerant I/O: Timer 3 channel 2, [ADC1 trigger], LCD segment 7, ADC1 input 22, [comparator 2 positive input].
30 PD1/TIM3_ETR/LCD_COM3/ADC1_IN21 bidirectional Port D1 five-volt tolerant I/O: Timer 3 trigger, LCD COM3, ADC1 input 21, [comparator 1/2 positive inputs].
31 PD2/TIM1_CH1/LCD_SEG8/ADC1_IN20 bidirectional Port D2 five-volt tolerant I/O: Timer 1 channel 1, LCD segment 8, ADC1 input 20, [comparator 1 positive input].
32 PD3/TIM1_ETR/LCD_SEG9/ADC1_IN19 bidirectional Port D3 five-volt tolerant I/O: Timer 1 trigger, LCD segment 9, ADC1 input 19, [comparator 1 positive input].
33 PH4/USART2_RX bidirectional Port H4 five-volt tolerant I/O: USART2 receive.
34 PH5/USART2_TX bidirectional Port H5 five-volt tolerant I/O: USART2 transmit.
35 PH6/USART2_CK/TIM5_CH1 bidirectional Port H6 five-volt tolerant I/O: USART2 synchronous clock, Timer 5 channel 1.
36 PH7/TIM5_CH2 bidirectional Port H7 five-volt tolerant I/O: Timer 5 channel 2.
37 VDD3 power_in I/O supply voltage, 1.65 to 3.6 V; must not be left unconnected.
38 VSS3 power_in I/O ground voltage; must not be left unconnected.
39 PB0/TIM2_CH1/LCD_SEG10/ADC1_IN18 bidirectional Port B0 five-volt tolerant I/O (pull-up during reset): Timer 2 channel 1, LCD segment 10, ADC1 input 18, [comparator 1 positive input].
40 PB1/TIM3_CH1/LCD_SEG11/ADC1_IN17 bidirectional Port B1 five-volt tolerant I/O: Timer 3 channel 1, LCD segment 11, ADC1 input 17, [comparator 1 positive input].
41 PB2/TIM2_CH2/LCD_SEG12/ADC1_IN16 bidirectional Port B2 five-volt tolerant I/O: Timer 2 channel 2, LCD segment 12, ADC1 input 16, [comparator 1 positive input].
42 PB3/TIM2_ETR/LCD_SEG13/ADC1_IN15 bidirectional Port B3 five-volt tolerant I/O: Timer 2 trigger, LCD segment 13, ADC1 input 15, [comparator 1 positive input].
43 PB4/SPI1_NSS/LCD_SEG14/ADC1_IN14 bidirectional Port B4 five-volt tolerant I/O (pull-up during reset): SPI1 master/slave select, LCD segment 14, ADC1 input 14, [comparator 1 positive input].
44 PB5/SPI1_SCK/LCD_SEG15/ADC1_IN13 bidirectional Port B5 five-volt tolerant I/O: SPI1 clock, LCD segment 15, ADC1 input 13, [comparator 1 positive input].
45 PB6/SPI1_MOSI/LCD_SEG16/ADC1_IN12 bidirectional Port B6 five-volt tolerant I/O: SPI1 master out/slave in, LCD segment 16, ADC1 input 12, [comparator 1 positive input].
46 PB7/SPI1_MISO/LCD_SEG17/ADC1_IN11 bidirectional Port B7 five-volt tolerant I/O: SPI1 master in/slave out, LCD segment 17, ADC1 input 11, [comparator 1 positive input].
47 VDD4 power_in I/O supply voltage, 1.65 to 3.6 V; must not be left unconnected.
48 VSS4 power_in I/O ground voltage; must not be left unconnected.
49 PF0/ADC1_IN24/DAC_OUT1 bidirectional Port F0 I/O: ADC1 input 24, DAC 1 output, [USART3 transmit], [SPI1 MISO].
50 PF1/ADC1_IN25/DAC_OUT2 bidirectional Port F1 I/O: ADC1 input 25, DAC channel 2 output, [USART3 receive], [SPI1 MOSI].
51 PF2/ADC1_IN26 bidirectional Port F2 I/O: ADC1 input 26, [SPI1 clock], [USART3 clock].
52 PF3/ADC1_IN27 bidirectional Port F3 I/O: ADC1 input 27, [SPI1 master/slave select].
53 PF4/LCD_SEG40 bidirectional Port F4 five-volt tolerant I/O: LCD segment 40, [LCD COM4].
54 PF5/LCD_SEG41 bidirectional Port F5 five-volt tolerant I/O: LCD segment 41, [LCD COM5].
55 PF6/LCD_SEG42 bidirectional Port F6 five-volt tolerant I/O: LCD segment 42, [LCD COM6].
56 PF7/LCD_SEG43 bidirectional Port F7 five-volt tolerant I/O: LCD segment 43, [LCD COM7].
57 PD4/TIM1_CH2/LCD_SEG18/ADC1_IN10 bidirectional Port D4 five-volt tolerant I/O: Timer 1 channel 2, LCD segment 18, ADC1 input 10, [comparator 1 positive input].
58 PD5/TIM1_CH3/LCD_SEG19/ADC1_IN9 bidirectional Port D5 five-volt tolerant I/O: Timer 1 channel 3, LCD segment 19, ADC1 input 9, [comparator 1 positive input].
59 PD6/TIM1_BKIN/LCD_SEG20/ADC1_IN8 bidirectional Port D6 five-volt tolerant I/O: Timer 1 break input, LCD segment 20, ADC1 input 8, RTC calibration, VREFINT output.
60 PD7/TIM1_CH1N/LCD_SEG21/ADC1_IN7 bidirectional Port D7 five-volt tolerant I/O: Timer 1 inverted channel 1, LCD segment 21, ADC1 input 7, RTC alarm, VREFINT output.
61 PG4/LCD_SEG32/SPI2_NSS bidirectional Port G4 five-volt tolerant I/O: LCD segment 32, SPI2 master/slave select.
62 PG5/LCD_SEG33/SPI2_SCK bidirectional Port G5 five-volt tolerant I/O: LCD segment 33, SPI2 clock.
63 PG6/LCD_SEG34/SPI2_MOSI bidirectional Port G6 five-volt tolerant I/O: LCD segment 34, SPI2 master out/slave in.
64 PG7/LCD_SEG35/SPI2_MISO bidirectional Port G7 five-volt tolerant I/O: LCD segment 35, SPI2 master in/slave out.
65 PC0/I2C1_SDA bidirectional Port C0 true open-drain five-volt tolerant I/O: I2C1 data.
66 PC1/I2C1_SCL bidirectional Port C1 true open-drain five-volt tolerant I/O: I2C1 clock.
67 VDD2 power_in I/O supply voltage, 1.65 to 3.6 V; must not be left unconnected.
68 VSS2 power_in I/O ground voltage; must not be left unconnected.
69 PC2/USART1_RX/LCD_SEG22/ADC1_IN6 bidirectional Port C2 five-volt tolerant I/O: USART1 receive, LCD segment 22, ADC1 input 6, [comparator 1 positive input], VREFINT output.
70 PC3/USART1_TX/LCD_SEG23/ADC1_IN5 bidirectional Port C3 five-volt tolerant I/O: USART1 transmit, LCD segment 23, ADC1 input 5, [comparator 2 negative and comparator 1 positive inputs].
71 PC4/USART1_CK/I2C1_SMB/LCD_SEG24/ADC1_IN4 bidirectional Port C4 five-volt tolerant I/O: USART1 synchronous clock, I2C1 SMBus alert, [CCO], LCD segment 24, ADC1 input 4, [comparator inputs].
72 PC5/OSC32_IN bidirectional Port C5 five-volt tolerant I/O: LSE oscillator input, [SPI1 NSS], [USART1 transmit].
73 PC6/OSC32_OUT bidirectional Port C6 five-volt tolerant I/O: LSE oscillator output, [SPI1 clock], [USART1 receive].
74 PC7/LCD_SEG25/ADC1_IN3 bidirectional Port C7 five-volt tolerant I/O: LCD segment 25, ADC1 input 3, [comparator 2 negative and comparator 1 positive inputs].
75 PE6/LCD_SEG26/PVD_IN/TIM5_BKIN bidirectional Port E6 five-volt tolerant I/O: LCD segment 26, PVD input, Timer 5 break input.
76 PE7/LCD_SEG27/TIM5_ETR bidirectional Port E7 five-volt tolerant I/O: LCD segment 27, Timer 5 trigger.
77 PI0/RTC_TAMP1 bidirectional Port I0 five-volt tolerant I/O: RTC tamper 1 input, [SPI2 NSS], [Timer 3 channel 1].
78 PI1/RTC_TAMP2 bidirectional Port I1 five-volt tolerant I/O: RTC tamper 2 input, [SPI2 clock].
79 PI2/RTC_TAMP3 bidirectional Port I2 five-volt tolerant I/O: RTC tamper 3 input, [SPI2 MOSI].
80 PI3 bidirectional Port I3 five-volt tolerant I/O: [SPI2 MISO], [Timer 3 channel 2].

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-80(14x14)
Category Single Chip Microcomputer/Microcontroller
Pins 80

CAD (KiCad official)

  • Symbol: STM8L162M8T6
  • Footprint: Package_QFP:LQFP-80_14x14mm_P0.65mm
  • 3D model: LQFP-80(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm8l162m8t6-etched.step / stm8l162m8t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm8l162m8t6.step / stm8l162m8t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (147 pp, sha256 193f2133f3d81d2b, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF