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STM8L152C4T3

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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STM8L152C4T3

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM8L152C4T3 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA0 bidirectional Port A0 general purpose I/O with SWIM interface, beeper output, and infrared timer output functions; high sink LED driver capable.
2 NRST/PA1 bidirectional Reset input pin (NRST) with internal pull-up; configurable as general purpose output (PA1) in open-drain or push-pull mode.
3 PA2 bidirectional Port A2 general purpose I/O with HSE oscillator input function and optional USART1 transmit or SPI1 MISO alternate functions.
4 PA3 bidirectional Port A3 general purpose I/O with HSE oscillator output function and optional USART1 receive or SPI1 MOSI alternate functions.
5 PA4 bidirectional Port A4 general purpose I/O with Timer 2 break input, LCD COM0 segment, ADC1 input channel 2, and Comparator 1 positive input functions.
6 PA5 bidirectional Port A5 general purpose I/O with Timer 3 break input, LCD COM1 segment, ADC1 input channel 1, and Comparator 1 positive input functions.
7 PA6 bidirectional Port A6 general purpose I/O with optional ADC1 trigger, LCD COM2 segment, ADC1 input channel 0, and Comparator 1 positive input functions.
8 PA7 bidirectional Port A7 general purpose I/O five-volt tolerant with LCD segment 0 function.
9 VSS1/VSSA/VREF- power_in Ground pins for I/O (VSS1), analog circuits (VSSA), and ADC1 negative voltage reference (VREF-); must be connected to external power supply.
10 VDD1/VDDA/VREF+ power_in Power supply pins for digital I/O (VDD1), analog circuits (VDDA), and ADC1/DAC positive reference (VREF+) from 1.65 V to 3.6 V.
11 VDDA power_in Analog supply voltage from 1.65 V to 3.6 V (minimum 1.8 V when ADC1 or DAC is used); must be connected to VDD1.
12 VREF+ power_in External positive voltage reference for ADC1 and DAC from 1.8 V to VDDA; must be provided externally.
13 VLCD power_in LCD booster external capacitor supply voltage from 2.5 V to 3.6 V for LCD controller (STM8L152 only).
14 PE0 bidirectional Port E0 general purpose I/O five-volt tolerant with LCD segment 1 function.
15 PE1 bidirectional Port E1 general purpose I/O with Timer 1 inverted channel 2 output and LCD segment 2 functions.
16 PE2 bidirectional Port E2 general purpose I/O with Timer 1 inverted channel 3 output and LCD segment 3 functions.
17 PE3 bidirectional Port E3 general purpose I/O with LCD segment 4 function.
18 PE4 bidirectional Port E4 general purpose I/O with LCD segment 5 function.
19 PE5 bidirectional Port E5 general purpose I/O with LCD segment 6, ADC1 input channel 23, and Comparator 2 positive input functions.
20 PD0 bidirectional Port D0 general purpose I/O with Timer 3 channel 2 output, ADC1 trigger, LCD segment 7, ADC1 input 22, and Comparator 2/1 positive input functions.
21 PD1 bidirectional Port D1 general purpose I/O with Timer 3 external trigger, LCD COM3, ADC1 input 21, and Comparator 2/1 positive input functions.
22 PD2 bidirectional Port D2 general purpose I/O with Timer 1 channel 1 output, LCD segment 8, ADC1 input 20, and Comparator 1 positive input functions.
23 PD3 bidirectional Port D3 general purpose I/O with Timer 1 external trigger, LCD segment 9, ADC1 input 19, and Comparator 1 positive input functions.
24 PB0 bidirectional Port B0 general purpose I/O with internal pull-up during reset, Timer 2 channel 1, LCD segment 10, ADC1 input 18, and Comparator 1 positive input functions.
25 PB1 bidirectional Port B1 general purpose I/O with Timer 3 channel 1, LCD segment 11, ADC1 input 17, and Comparator 1 positive input functions.
26 PB2 bidirectional Port B2 general purpose I/O with Timer 2 channel 2, LCD segment 12, ADC1 input 16, and Comparator 1 positive input functions.
27 PB3 bidirectional Port B3 general purpose I/O with Timer 2 external trigger, LCD segment 13, ADC1 input 15, and Comparator 1 positive input functions.
28 PB4 bidirectional Port B4 general purpose I/O with internal pull-up during reset, optional SPI1 master/slave select, LCD segment 14, ADC1 input 14, and Comparator 1 positive input functions.
29 PB5 bidirectional Port B5 general purpose I/O with optional SPI1 clock, LCD segment 15, ADC1 input 13, and Comparator 1 positive input functions.
30 PB6 bidirectional Port B6 general purpose I/O with optional SPI1 master out/slave in, LCD segment 16, ADC1 input 12, and Comparator 1 positive input functions.
31 PB7 bidirectional Port B7 general purpose I/O with optional SPI1 master in slave out, LCD segment 17, ADC1 input 11, and Comparator 1 positive input functions.
32 PF0 bidirectional Port F0 general purpose I/O with ADC1 input channel 24 and DAC output functions.
33 PD4 bidirectional Port D4 general purpose I/O with Timer 1 channel 2 output, LCD segment 18, ADC1 input 10, and Comparator 1 positive input functions.
34 PD5 bidirectional Port D5 general purpose I/O with Timer 1 channel 3 output, LCD segment 19, ADC1 input 9, and Comparator 1 positive input functions.
35 PD6 bidirectional Port D6 general purpose I/O with Timer 1 break input, LCD segment 20, ADC1 input 8, RTC calibration output, internal voltage reference output, and Comparator 1 positive input functions.
36 PD7 bidirectional Port D7 general purpose I/O with Timer 1 inverted channel 1, LCD segment 21, ADC1 input 7, RTC alarm output, internal voltage reference output, and Comparator 1 positive input functions.
37 PC0 bidirectional Port C0 general purpose I/O five-volt tolerant with true open-drain output and I2C1 data (SDA) function.
38 PC1 bidirectional Port C1 general purpose I/O five-volt tolerant with true open-drain output and I2C1 clock (SCL) function.
39 VDD2 power_in I/O supply voltage from 1.65 V to 3.6 V; must be connected to VDD1 externally.
40 VSS2 power_in I/O ground voltage pin; must be connected to VSS1 externally.
41 PC2 bidirectional Port C2 general purpose I/O with USART1 receive, LCD segment 22, ADC1 input 6, Comparator 1 positive input, and internal voltage reference output functions.
42 PC3 bidirectional Port C3 general purpose I/O with USART1 transmit, LCD segment 23, ADC1 input 5, Comparator 1 positive input, and Comparator 2 negative input functions.
43 PC4 bidirectional Port C4 general purpose I/O with USART1 synchronous clock, I2C1 SMB, configurable clock output, LCD segment 24, ADC1 input 4, and Comparator 2/1 negative/positive input functions.
44 PC5 bidirectional Port C5 general purpose I/O with LSE oscillator input function and optional SPI1 master/slave select or USART1 transmit.
45 PC6 bidirectional Port C6 general purpose I/O with LSE oscillator output function and optional SPI1 clock or USART1 receive.
46 PC7 bidirectional Port C7 general purpose I/O with LCD segment 25, ADC1 input 3, Comparator 2 negative input, and Comparator 1 positive input functions.
47 PE6 bidirectional Port E6 general purpose I/O with LCD segment 26 and programmable voltage detector (PVD) input functions.
48 PE7 bidirectional Port E7 general purpose I/O with LCD segment 27 function.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM8L152C4T3
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm8l152c4t3-etched.step / stm8l152c4t3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm8l152c4t3.step / stm8l152c4t3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (141 pp, sha256 76f669f0972e887a, retrieved 2026-09-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF