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STM8L151K4U6TR

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STMicroelectronics ST Microelectronics, UFQFPN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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STM8L151K4U6TR

STMicroelectronics · ST Microelectronics · UFQFPN-32(5x5)

STM8L151K4U6TR from STMicroelectronics, in a UFQFPN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NRST/PA1 bidirectional Reset input with pull-up at power-up; as general-purpose PA1 it can only be configured as open-drain or push-pull output, not as a general-purpose input.
2 PA2 bidirectional Port A2 (high sink/source 20 mA) with HSE oscillator input, USART1 transmit and SPI1 master-in/slave-out alternate functions.
3 PA3 bidirectional Port A3 (high sink/source 20 mA) with HSE oscillator output, USART1 receive and SPI1 master-out/slave-in alternate functions.
4 PA4 bidirectional Port A4 (3.6 V tolerant, high sink/source 20 mA) with TIM2 break input, optional TIM2 external trigger, ADC1 input 2 and comparator 1 positive input.
5 PA5 bidirectional Port A5 (3.6 V tolerant, high sink/source 20 mA) with TIM3 break input, optional TIM3 external trigger, ADC1 input 1 and comparator 1 positive input.
6 PA6 bidirectional Port A6 (3.6 V tolerant, high sink/source 20 mA) with optional ADC1 trigger, ADC1 input 0 and comparator 1 positive input.
7 VSS1/VSSA/VREF- power_in I/O ground, analog ground voltage and ADC1 negative voltage reference.
8 VDD1/VDDA/VREF+ power_in Digital power supply, analog supply voltage and ADC1 positive voltage reference; the device operates from 1.8 V to 3.6 V (down to 1.65 V at power down).
9 PD0 bidirectional Port D0 (3.6 V tolerant, high sink/source 20 mA) with TIM3 channel 2, optional ADC1 trigger, ADC1 input 22 and comparator 1/2 positive inputs.
10 PD1 bidirectional Port D1 (3.6 V tolerant, high sink/source 20 mA) with TIM1 inverted channel 3, optional TIM3 external trigger, ADC1 input 21 and comparator 1/2 positive inputs.
11 PD2 bidirectional Port D2 (3.6 V tolerant, high sink/source 20 mA) with TIM1 channel 1, ADC1 input 20 and comparator 1 positive input.
12 PD3 bidirectional Port D3 (3.6 V tolerant, high sink/source 20 mA) with TIM1 external trigger, ADC1 input 19 and comparator 1 positive input.
13 PB0 bidirectional Port B0 (3.6 V tolerant, high sink/source 20 mA) with TIM2 channel 1, ADC1 input 18 and comparator 1 positive input; a pull-up is applied during reset and the pin is floating input after reset release.
14 PB1 bidirectional Port B1 (3.6 V tolerant, high sink/source 20 mA) with TIM3 channel 1, ADC1 input 17 and comparator 1 positive input.
15 PB2 bidirectional Port B2 (3.6 V tolerant, high sink/source 20 mA) with TIM2 channel 2, ADC1 input 16 and comparator 1 positive input.
16 PB3 bidirectional Port B3 (3.6 V tolerant, high sink/source 20 mA) with optional TIM2 external trigger, TIM1 inverted channel 2, ADC1 input 15 and comparator 1 positive input.
17 PB4 bidirectional Port B4 (3.6 V tolerant, high sink/source 20 mA) with optional SPI1 master/slave select, ADC1 input 14, DAC output and comparator 1 positive input; a pull-up is applied during reset and the pin is floating input after reset release.
18 PB5 bidirectional Port B5 (3.6 V tolerant, high sink/source 20 mA) with optional SPI1 clock, ADC1 input 13, DAC output and comparator 1 positive input.
19 PB6 bidirectional Port B6 (3.6 V tolerant, high sink/source 20 mA) with optional SPI1 master out/slave in, ADC1 input 12, DAC output and comparator 1 positive input.
20 PB7 bidirectional Port B7 (3.6 V tolerant, high sink/source 20 mA) with optional SPI1 master in/slave out, ADC1 input 11 and comparator 1 positive input.
21 PD4 bidirectional Port D4 (3.6 V tolerant, high sink/source 20 mA) with TIM1 channel 2, ADC1 input 10 and comparator 1 positive input.
22 PD5 bidirectional Port D5 (3.6 V tolerant, high sink/source 20 mA) with TIM1 channel 3, ADC1 input 9 and comparator 1 positive input.
23 PD6 bidirectional Port D6 (3.6 V tolerant, high sink/source 20 mA) with TIM1 break input, ADC1 input 8, RTC calibration, internal voltage reference output and comparator 1 positive input.
24 PD7 bidirectional Port D7 (3.6 V tolerant, high sink/source 20 mA) with TIM1 inverted channel 1, ADC1 input 7, RTC alarm, internal voltage reference output and comparator 1 positive input.
25 PC0 bidirectional Port C0 (5 V tolerant true open-drain I/O, no protection diode to VDD) carrying the I2C1 SDA function.
26 PC1 bidirectional Port C1 (5 V tolerant true open-drain I/O, no protection diode to VDD) carrying the I2C1 SCL function.
27 PC2 bidirectional Port C2 (3.6 V tolerant, high sink/source 20 mA) with USART1 receive, ADC1 input 6, comparator 1 positive input and internal voltage reference output.
28 PC3 bidirectional Port C3 (3.6 V tolerant, high sink/source 20 mA) with USART1 transmit, ADC1 input 5, comparator 1 positive input and comparator 2 negative input.
29 PC4 bidirectional Port C4 (3.6 V tolerant, high sink/source 20 mA) with USART1 synchronous clock, I2C1 SMBus, configurable clock output, ADC1 input 4, comparator 2 negative input and comparator 1 positive input.
30 PC5 bidirectional Port C5 (high sink/source 20 mA) with LSE oscillator input and optional SPI1 master/slave select and USART1 transmit.
31 PC6 bidirectional Port C6 (high sink/source 20 mA) with LSE oscillator output and optional SPI1 clock and USART1 receive.
32 PA0 bidirectional Port A0 (high sink/source 20 mA, high sink LED driver capability) with USART1 synchronous clock, SWIM input/output, beep output and infrared timer output; input pull-up during reset and after reset release.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package UFQFPN-32(5x5)
Category Embedded Processors & Controllers
Pins 33

CAD (KiCad official)

  • Symbol: STM8L151K4U6TR
  • Footprint: Package_DFN_QFN:UFQFPN-32-1EP_5x5mm_P0.5mm_EP3.5x3.5mm
  • 3D model: UFQFPN-32(5x5) (KiCad packages3D, STEP)
  • 3D model files: stm8l151k4u6tr-etched.step / stm8l151k4u6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm8l151k4u6tr.step / stm8l151k4u6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (142 pp, sha256 6c51d6b741c9d74e, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF