component
STM8L151C6U6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM8L151C6U6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-48(7x7)
STM8L151C6U6 from STMicroelectronics, in a UFQFPN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA0 | bidirectional | Port A0 high-sink I/O (LED driver capable), input pull-up in and after reset, with alternate functions [USART1_CK], SWIM input/output, BEEP output and IR_TIM output. |
| 2 | NRST/PA1 | bidirectional | Reset input with pull-up at power-up (VIL max 0.8 V, VIH min 1.4 V), usable only as general-purpose output (PA1) open-drain or push-pull. |
| 3 | PA2 | bidirectional | Port A2 high-sink I/O with HSE oscillator input (OSC_IN) and remappable [USART1_TX]/[SPI1_MISO]. |
| 4 | PA3 | bidirectional | Port A3 high-sink I/O with HSE oscillator output (OSC_OUT) and remappable [USART1_RX]/[SPI1_MOSI]. |
| 5 | PA4 | bidirectional | Port A4 3.6 V tolerant high-sink I/O with TIM2_BKIN, ADC1_IN2 and COMP1_INP. |
| 6 | PA5 | bidirectional | Port A5 3.6 V tolerant high-sink I/O with TIM3_BKIN, ADC1_IN1 and COMP1_INP. |
| 7 | PA6 | bidirectional | Port A6 3.6 V tolerant high-sink I/O with [ADC1_TRIG], ADC1_IN0 and COMP1_INP. |
| 8 | PA7 | bidirectional | Port A7 five-volt tolerant high-sink I/O (no protection diode to VDD); LCD_SEG0 function is on STM8L152xx only. |
| 9 | VSS1/VSSA/VREF- | power_in | I/O ground, analog ground and ADC1 negative voltage reference. |
| 10 | VDD1 | power_in | Digital power supply, 1.8 V to 3.6 V operating range (down to 1.65 V at power down). |
| 11 | VDDA | power_in | Analog supply voltage. |
| 12 | VREF+ | power_in | ADC1 and DAC positive voltage reference. |
| 13 | Reserved | passive | Reserved on STM8L151xx; must be tied to VDD (this pin is VLCD on STM8L152xx). |
| 14 | PE0 | bidirectional | Port E0 five-volt tolerant high-sink I/O (no protection diode to VDD); LCD_SEG1 function is STM8L152xx only. |
| 15 | PE1 | bidirectional | Port E1 3.6 V tolerant high-sink I/O with TIM1_CH2N. |
| 16 | PE2 | bidirectional | Port E2 3.6 V tolerant high-sink I/O with TIM1_CH3N. |
| 17 | PE3 | bidirectional | Port E3 3.6 V tolerant high-sink I/O (LCD_SEG4 on STM8L152xx only). |
| 18 | PE4 | bidirectional | Port E4 3.6 V tolerant high-sink I/O (LCD_SEG5 on STM8L152xx only). |
| 19 | PE5 | bidirectional | Port E5 3.6 V tolerant high-sink I/O with ADC1_IN23, COMP2_INP and COMP1_INP. |
| 20 | PD0 | bidirectional | Port D0 3.6 V tolerant high-sink I/O with TIM3_CH2, [ADC1_TRIG], ADC1_IN22, COMP2_INP and COMP1_INP. |
| 21 | PD1 | bidirectional | Port D1 3.6 V tolerant high-sink I/O with TIM3_ETR, ADC1_IN21, COMP2_INP and COMP1_INP. |
| 22 | PD2 | bidirectional | Port D2 3.6 V tolerant high-sink I/O with TIM1_CH1, ADC1_IN20 and COMP1_INP. |
| 23 | PD3 | bidirectional | Port D3 3.6 V tolerant high-sink I/O with TIM1_ETR, ADC1_IN19 and COMP1_INP. |
| 24 | PB0 | bidirectional | Port B0 3.6 V tolerant high-sink I/O with TIM2_CH1, ADC1_IN18 and COMP1_INP; pull-up applied during reset, input floating after reset release. |
| 25 | PB1 | bidirectional | Port B1 3.6 V tolerant high-sink I/O with TIM3_CH1, ADC1_IN17 and COMP1_INP. |
| 26 | PB2 | bidirectional | Port B2 3.6 V tolerant high-sink I/O with TIM2_CH2, ADC1_IN16 and COMP1_INP. |
| 27 | PB3 | bidirectional | Port B3 3.6 V tolerant high-sink I/O with TIM2_ETR, ADC1_IN15 and COMP1_INP. |
| 28 | PB4 | bidirectional | Port B4 3.6 V tolerant high-sink I/O with [SPI1_NSS], ADC1_IN14 and COMP1_INP; pull-up applied during reset, input floating after reset release. |
| 29 | PB5 | bidirectional | Port B5 3.6 V tolerant high-sink I/O with [SPI1_SCK], ADC1_IN13 and COMP1_INP. |
| 30 | PB6 | bidirectional | Port B6 3.6 V tolerant high-sink I/O with [SPI1_MOSI], ADC1_IN12 and COMP1_INP. |
| 31 | PB7 | bidirectional | Port B7 3.6 V tolerant high-sink I/O with [SPI1_MISO], ADC1_IN11 and COMP1_INP. |
| 32 | PF0 | bidirectional | Port F0 3.6 V tolerant high-sink I/O with ADC1_IN24 and DAC_OUT. |
| 33 | PD4 | bidirectional | Port D4 3.6 V tolerant high-sink I/O with TIM1_CH2, ADC1_IN10 and COMP1_INP. |
| 34 | PD5 | bidirectional | Port D5 3.6 V tolerant high-sink I/O with TIM1_CH3, ADC1_IN9 and COMP1_INP. |
| 35 | PD6 | bidirectional | Port D6 3.6 V tolerant high-sink I/O with TIM1_BKIN, ADC1_IN8, RTC_CALIB, VREFINT output and COMP1_INP. |
| 36 | PD7 | bidirectional | Port D7 3.6 V tolerant high-sink I/O with TIM1_CH1N, ADC1_IN7, RTC_ALARM, VREFINT output and COMP1_INP. |
| 37 | PC0 | bidirectional | Port C0 five-volt tolerant true open-drain I/O (no protection diode to VDD) with I2C1_SDA data. |
| 38 | PC1 | bidirectional | Port C1 five-volt tolerant true open-drain I/O (no protection diode to VDD) with I2C1_SCL clock. |
| 39 | VDD2 | power_in | I/O supply voltage. |
| 40 | VSS2 | power_in | I/O ground voltage. |
| 41 | PC2 | bidirectional | Port C2 3.6 V tolerant high-sink I/O with USART1_RX, ADC1_IN6, COMP1_INP and VREFINT output. |
| 42 | PC3 | bidirectional | Port C3 3.6 V tolerant high-sink I/O with USART1_TX, ADC1_IN5, COMP1_INP and COMP2_INM. |
| 43 | PC4 | bidirectional | Port C4 3.6 V tolerant high-sink I/O with USART1_CK, I2C1_SMB, CCO, ADC1_IN4, COMP2_INM and COMP1_INP. |
| 44 | PC5 | bidirectional | Port C5 high-sink I/O with LSE oscillator input (OSC32_IN) and remappable [SPI1_NSS]/[USART1_TX]. |
| 45 | PC6 | bidirectional | Port C6 high-sink I/O with LSE oscillator output (OSC32_OUT) and remappable [SPI1_SCK]/[USART1_RX]. |
| 46 | PC7 | bidirectional | Port C7 3.6 V tolerant high-sink I/O with ADC1_IN3, COMP2_INM and COMP1_INP. |
| 47 | PE6 | bidirectional | Port E6 3.6 V tolerant high-sink I/O with PVD_IN. |
| 48 | PE7 | bidirectional | Port E7 3.6 V tolerant high-sink I/O (LCD_SEG27 on STM8L152xx only). |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFQFPN-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
STM8L151C6U6 - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: UFQFPN-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm8l151c6u6-etched.step/stm8l151c6u6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm8l151c6u6.step/stm8l151c6u6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (141 pp, sha256
76f669f0972e887a, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).