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STM8L051F3P6TR

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs stm8l051f3p6tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json stm8l051f3p6tr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md stm8l051f3p6tr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
stm8l051f3p6tr-etched.fit.json stm8l051f3p6tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
stm8l051f3p6tr-etched.glb stm8l051f3p6tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
stm8l051f3p6tr-etched.step stm8l051f3p6tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
stm8l051f3p6tr.glb Publish 0.1.0 · Ray
stm8l051f3p6tr.kicad_mod Publish 0.1.0 · Ray
stm8l051f3p6tr.kicad_sym Publish 0.1.0 · Ray
stm8l051f3p6tr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
stm8l051f3p6tr.step Publish 0.1.0 · Ray

STM8L051F3P6TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TSSOP-20

STM8L051F3P6TR from STMicroelectronics, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PC5/OSC32_IN/[SPI1_NSS]/[USART_TX]/TIM2_CH1 bidirectional Port C bit 5 general-purpose I/O (5 V tolerant not indicated; high-sink 20 mA output). Alternate functions: LSE oscillator input (OSC32_IN), remappable SPI1_NSS or USART_TX, and TIM2 channel 1 capture/compare.
2 PC6/OSC32_OUT/[SPI_SCK]/[USART_RX]/TIM2_CH2 bidirectional Port C bit 6 general-purpose I/O (high-sink 20 mA). Alternate functions: LSE oscillator output (OSC32_OUT), remappable SPI clock or USART_RX, and TIM2 channel 2 capture/compare.
3 PA0/[USART_CK]/SWIM/BEEP/IR_TIM bidirectional Port A bit 0 general-purpose I/O with high-sink LED-driver capability. Serves as the SWIM single-wire debug/programming pin, and provides BEEP output, IR timer output, or optional USART synchronous clock.
4 NRST/PA1 bidirectional Active-low device reset input with internal pull-up (high-sink output when used as GPIO). Can be reconfigured via option byte as general-purpose PA1 output (open-drain or push-pull); do not use as a general-purpose input.
5 PA2/OSC_IN/[USART_TX]/[SPI_MISO] bidirectional Port A bit 2 general-purpose I/O (high-sink 20 mA). Alternate functions: HSE crystal oscillator input (OSC_IN), remappable USART transmit or SPI master-in/slave-out.
6 PA3/OSC_OUT/[USART_RX]/[SPI_MOSI] bidirectional Port A bit 3 general-purpose I/O (high-sink 20 mA). Alternate functions: HSE crystal oscillator output (OSC_OUT), remappable USART receive or SPI master-out/slave-in.
7 VSS/VSSA/VREF- power_in Combined digital ground, analog ground and ADC1 negative reference. Tie to system ground (0 V).
8 VDD/VDDA/VREF+ power_in Combined digital supply, analog supply and ADC1 positive voltage reference. 1.8 V to 3.6 V operating range; decouple locally.
9 PD0/TIM3_CH2/[ADC1_TRIG]/ADC1_IN22 bidirectional Port D bit 0 general-purpose I/O (high-sink 20 mA). Alternate functions: TIM3 channel 2 capture/compare, remappable ADC1 external trigger input, and ADC1 analog input channel 22.
10 PB0/TIM2_CH1/ADC1_IN18 bidirectional Port B bit 0 general-purpose I/O (high-sink 20 mA). Alternate functions: TIM2 channel 1 capture/compare and ADC1 analog input channel 18.
11 PB1/TIM3_CH1/ADC1_IN17 bidirectional Port B bit 1 general-purpose I/O (high-sink 20 mA). Alternate functions: TIM3 channel 1 capture/compare and ADC1 analog input channel 17.
12 PB2/TIM2_CH2/ADC1_IN16 bidirectional Port B bit 2 general-purpose I/O (high-sink 20 mA). Alternate functions: TIM2 channel 2 capture/compare and ADC1 analog input channel 16.
13 PB3/TIM2_ETR/ADC1_IN15/RTC_ALARM bidirectional Port B bit 3 general-purpose I/O (high-sink 20 mA). Alternate functions: TIM2 external trigger, ADC1 analog input channel 15, and RTC alarm output.
14 PB4/SPI1_NSS/ADC1_IN14 bidirectional Port B bit 4 general-purpose I/O (high-sink 20 mA). Alternate functions: SPI1 master/slave select (NSS) and ADC1 analog input channel 14.
15 PB5/SPI_SCK/ADC1_IN13 bidirectional Port B bit 5 general-purpose I/O (high-sink 20 mA). Alternate functions: SPI1 clock and ADC1 analog input channel 13.
16 PB6/SPI1_MOSI/ADC1_IN12 bidirectional Port B bit 6 general-purpose I/O (high-sink 20 mA). Alternate functions: SPI1 master-out/slave-in (MOSI) and ADC1 analog input channel 12.
17 PB7/SPI1_MISO/ADC1_IN11 bidirectional Port B bit 7 general-purpose I/O (high-sink 20 mA). Alternate functions: SPI1 master-in/slave-out (MISO) and ADC1 analog input channel 11.
18 PC0/I2C_SDA bidirectional Port C bit 0 general-purpose I/O, 5 V tolerant (FT), true open-drain output only. Alternate function: I2C1 data line (SDA).
19 PC1/I2C_SCL bidirectional Port C bit 1 general-purpose I/O, 5 V tolerant (FT), true open-drain output only. Alternate function: I2C1 clock line (SCL).
20 PC4/USART_CK/I2C_SMB/CCO/ADC1_IN4 bidirectional Port C bit 4 general-purpose I/O (high-sink 20 mA). Alternate functions: USART synchronous clock, I2C SMBus alert, configurable clock output (CCO), and ADC1 analog input channel 4 (fast channel).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TSSOP-20
Category MCU
Pins 20

Ordering variants

Same part, different packaging or reel option.

  • STM8L051F3P6TR

CAD (KiCad official)

  • Symbol: STM8L051F3P6TR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: stm8l051f3p6tr-etched.step / stm8l051f3p6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm8l051f3p6tr.step / stm8l051f3p6tr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
stm8l051f3p6tr.step 267 KB You want the bare part, or you mark your own boards.
stm8l051f3p6tr-etched.step 3.5 MB You want the part with STM8L051F3P6TR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 848 faces against 327 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (93 pp, sha256 4db2aed5fb3f8c22, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF