component

STM8AL3L68TCY

Public Made by Adom

by adom

STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm8al3l68tcyfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 2d ago
viewers stm8al3l68tcy: viewers · Ray 2d ago
package.json Publish 0.1.0 · Ray 2d ago
page.json Set visibility: public · Ray 2d ago
README.md Initial commit: component/stm8al3l68tcy · Ray 2d ago
stm8al3l68tcy-etched.glb stm8al3l68tcy: factory component page (tier=lcsc) · Ray 2d ago
stm8al3l68tcy-etched.step stm8al3l68tcy: factory component page (tier=lcsc) · Ray 2d ago
stm8al3l68tcy-hero.glb stm8al3l68tcy: hero GLB from the etched model (keeps the MPN mark) · Ray 1d ago
stm8al3l68tcy-hero.overlay.json Publish 0.1.0 · Ray 2d ago
stm8al3l68tcy.glb Publish 0.1.0 · Ray 2d ago
stm8al3l68tcy.kicad_mod Publish 0.1.0 · Ray 2d ago
stm8al3l68tcy.kicad_sym Publish 0.1.0 · Ray 2d ago
stm8al3l68tcy.lbr Publish 0.1.0 · Ray 2d ago
stm8al3l68tcy.step Publish 0.1.0 · Ray 2d ago

STM8AL3L68TCY

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM8AL3L68TCY from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA0 bidirectional Port A0 (input pull-up in and after reset) with SWIM input/output, [USART1_CK] remap, Beep output and IR timer output, high sink LED driver capability.
2 NRST/PA1 bidirectional Reset input with pull-up at power-up; usable only as push-pull output PA1, not as open drain or general purpose input.
3 PA2 bidirectional Port A2 with HSE oscillator input OSC_IN, [USART1_TX] and [SPI1_MISO] remap options.
4 PA3 bidirectional Port A3 with HSE oscillator output OSC_OUT, [USART1_RX] and [SPI1_MOSI] remap options.
5 PA4 bidirectional Port A4 (3.6 V tolerant) with TIM2_BKIN, LCD_COM0, ADC1_IN2 and COMP1_INP.
6 PA5 bidirectional Port A5 (3.6 V tolerant) with TIM3_BKIN, LCD_COM1, ADC1_IN1 and COMP1_INP.
7 PA6 bidirectional Port A6 (3.6 V tolerant) with [ADC1_TRIG], LCD_COM2, ADC1_IN0 and COMP1_INP.
8 PA7 bidirectional Port A7 (five-volt tolerant) with LCD segment 0.
9 VSS1/VSSA/VREF- power_in I/O ground, analog ground and ADC1 negative voltage reference.
10 VDD1 power_in Digital power supply.
11 VDDA power_in Analog supply voltage.
12 VREF+ power_in ADC1 and DAC positive voltage reference.
13 VLCD passive LCD booster external capacitor pin (STM8AL3Lxx); the same pin is Reserved and must be tied to VDD on STM8AL31xx.
14 PE0 bidirectional Port E0 (five-volt tolerant) with LCD segment 1.
15 PE1 bidirectional Port E1 (3.6 V tolerant) with TIM1_CH2N and LCD segment 2.
16 PE2 bidirectional Port E2 (3.6 V tolerant) with TIM1_CH3N and LCD segment 3.
17 PE3 bidirectional Port E3 (3.6 V tolerant) with LCD segment 4.
18 PE4 bidirectional Port E4 (3.6 V tolerant) with LCD segment 5.
19 PE5 bidirectional Port E5 (3.6 V tolerant) with LCD segment 6, ADC1_IN23, COMP2_INP and COMP1_INP.
20 PD0 bidirectional Port D0 (3.6 V tolerant) with TIM3_CH2, [ADC1_TRIG], LCD segment 7, ADC1_IN22, COMP2_INP and COMP1_INP.
21 PD1 bidirectional Port D1 (3.6 V tolerant) with TIM3_ETR, LCD_COM3, ADC1_IN21, COMP2_INP and COMP1_INP.
22 PD2 bidirectional Port D2 (3.6 V tolerant) with TIM1_CH1, LCD segment 8, ADC1_IN20 and COMP1_INP.
23 PD3 bidirectional Port D3 (3.6 V tolerant) with TIM1_ETR, LCD segment 9, ADC1_IN19 and COMP1_INP.
24 PB0 bidirectional Port B0 (3.6 V tolerant, pull-up applied during reset, floating input after) with TIM2_CH1, LCD segment 10, ADC1_IN18 and COMP1_INP.
25 PB1 bidirectional Port B1 (3.6 V tolerant) with TIM3_CH1, LCD segment 11, ADC1_IN17 and COMP1_INP.
26 PB2 bidirectional Port B2 (3.6 V tolerant) with TIM2_CH2, LCD segment 12, ADC1_IN16 and COMP1_INP.
27 PB3 bidirectional Port B3 (3.6 V tolerant) with TIM2_ETR, LCD segment 13, ADC1_IN15 and COMP1_INP.
28 PB4 bidirectional Port B4 (3.6 V tolerant, pull-up during reset) with [SPI1_NSS], LCD segment 14, ADC1_IN14 and COMP1_INP.
29 PB5 bidirectional Port B5 (3.6 V tolerant) with [SPI1_SCK], LCD segment 15, ADC1_IN13 and COMP1_INP.
30 PB6 bidirectional Port B6 (3.6 V tolerant) with [SPI1_MOSI], LCD segment 16, ADC1_IN12 and COMP1_INP.
31 PB7 bidirectional Port B7 (3.6 V tolerant) with [SPI1_MISO], LCD segment 17, ADC1_IN11 and COMP1_INP.
32 PF0 bidirectional Port F0 (3.6 V tolerant) with ADC1_IN24 and DAC_OUT.
33 PD4 bidirectional Port D4 (3.6 V tolerant) with TIM1_CH2, LCD segment 18, ADC1_IN10 and COMP1_INP.
34 PD5 bidirectional Port D5 (3.6 V tolerant) with TIM1_CH3, LCD segment 19, ADC1_IN9 and COMP1_INP.
35 PD6 bidirectional Port D6 (3.6 V tolerant) with TIM1_BKIN, LCD segment 20, ADC1_IN8, RTC_CALIB, VREFINT output and COMP1_INP.
36 PD7 bidirectional Port D7 (3.6 V tolerant) with TIM1_CH1N, LCD segment 21, ADC1_IN7, RTC_ALARM, VREFINT output and COMP1_INP.
37 PC0 bidirectional Port C0 (five-volt tolerant, true open drain) with I2C1_SDA data.
38 PC1 bidirectional Port C1 (five-volt tolerant, true open drain) with I2C1_SCL clock.
39 VDD2 power_in IOs supply voltage.
40 VSS2 power_in IOs ground voltage.
41 PC2 bidirectional Port C2 (3.6 V tolerant) with USART1_RX, LCD segment 22, ADC1_IN6, COMP1_INP and VREFINT output.
42 PC3 bidirectional Port C3 (3.6 V tolerant) with USART1_TX, LCD segment 23, ADC1_IN5, COMP1_INP and COMP2_INM.
43 PC4 bidirectional Port C4 (3.6 V tolerant) with USART1_CK, I2C1_SMB, CCO, LCD segment 24, ADC1_IN4, COMP2_INM and COMP1_INP.
44 PC5 bidirectional Port C5 with LSE oscillator input OSC32_IN, [SPI1_NSS] and [USART1_TX] remap options.
45 PC6 bidirectional Port C6 with LSE oscillator output OSC32_OUT, [SPI1_SCK] and [USART1_RX] remap options.
46 PC7 bidirectional Port C7 (3.6 V tolerant) with LCD segment 25, ADC1_IN3, COMP2_INM and COMP1_INP.
47 PE6 bidirectional Port E6 (3.6 V tolerant) with LCD segment 26 and PVD_IN.
48 PE7 bidirectional Port E7 (3.6 V tolerant) with LCD segment 27.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM8AL3L68TCY
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm8al3l68tcy-etched.step / stm8al3l68tcy-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm8al3l68tcy.step / stm8al3l68tcy.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (123 pp, sha256 c556f7a6ad75fcd6, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF