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STM8AF6288TCY

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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STM8AF6288TCY

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM8AF6288TCY from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NRST bidirectional Reset pin (main function Reset, datasheet type I/O); its electrical limits are given in the NRST pin characteristics table (Table 39), which is not in the supplied text.
2 PA1/OSCIN bidirectional Port A1 I/O with weak pull-up and standard speed (O1, up to 2 MHz), also the resonator/crystal oscillator input OSCIN; in Halt/Active-halt the input/output path is disabled.
3 PA2/OSCOUT bidirectional Port A2 I/O with weak pull-up, external interrupt and standard speed (O1, up to 2 MHz), also the resonator/crystal oscillator output OSCOUT.
4 VSSIO_1 power_in I/O ground for the port I/O ring.
5 VSS power_in Digital ground.
6 VCAP power_out 1.8 V regulator capacitor connection; an external VCAP capacitor (CEXT) is required per Section 10.3.1.
7 VDD power_in Digital power supply.
8 VDDIO_1 power_in I/O power supply.
9 PA3/TIM2_CH3 bidirectional Port A3 I/O with standard speed (O1); default alternate function is Timer 2 channel 3, and TIM3_CH1 is available after AFR1 remap.
10 PA4/USART_RX bidirectional Port A4 I/O with USART receive function and programmable fast/slow speed (O3, slow by default after reset).
11 PA5/USART_TX bidirectional Port A5 I/O with USART transmit function and programmable fast/slow speed (O3, slow by default after reset).
12 PA6/USART_CK bidirectional Port A6 I/O with USART synchronous clock function and programmable fast/slow speed (O3, slow by default after reset).
13 VDDA power_in Analog power supply.
14 VSSA power_in Analog ground.
15 PB7/AIN7 bidirectional Port B7 I/O with standard speed (O1) and analog input 7.
16 PB6/AIN6 bidirectional Port B6 I/O with standard speed (O1) and analog input 6.
17 PB5/AIN5 bidirectional Port B5 I/O with analog input 5 and standard speed (O1); I2C_SDA is available on this pin after AFR6 remap.
18 PB4/AIN4 bidirectional Port B4 I/O with analog input 4 and standard speed (O1); I2C_SCL is available on this pin after AFR6 remap.
19 PB3/AIN3 bidirectional Port B3 I/O with analog input 3 and standard speed (O1); TIM1_ETR is available on this pin after AFR5 remap.
20 PB2/AIN2 bidirectional Port B2 I/O with analog input 2 and standard speed (O1); TIM1_CH3N is available on this pin after AFR5 remap.
21 PB1/AIN1 bidirectional Port B1 I/O with analog input 1 and standard speed (O1); TIM1_CH2N is available on this pin after AFR5 remap.
22 PB0/AIN0 bidirectional Port B0 I/O with analog input 0 and standard speed (O1); TIM1_CH1N is available on this pin after AFR5 remap.
23 PE7/AIN8 bidirectional Port E7 I/O with analog input 8 and standard speed (O1).
24 PE6/AIN9 bidirectional Port E6 I/O with analog input 9, external interrupt and standard speed (O1).
25 PE5/SPI_NSS bidirectional Port E5 I/O with SPI master/slave select function and standard speed (O1).
26 PC1/TIM1_CH1 bidirectional Port C1 high-sink I/O (8 mA) with Timer 1 channel 1 function and programmable fast/slow speed (O3).
27 PC2/TIM1_CH2 bidirectional Port C2 high-sink I/O (8 mA) with Timer 1 channel 2 function and programmable fast/slow speed (O3).
28 PC3/TIM1_CH3 bidirectional Port C3 high-sink I/O (8 mA) with Timer 1 channel 3 function and programmable fast/slow speed (O3).
29 PC4/TIM1_CH4 bidirectional Port C4 high-sink I/O (8 mA) with Timer 1 channel 4 function and programmable fast/slow speed (O3).
30 PC5/SPI_SCK bidirectional Port C5 I/O with SPI clock function and programmable fast/slow speed (O3).
31 VSSIO_2 power_in I/O ground for the port I/O ring.
32 VDDIO_2 power_in I/O power supply.
33 PC6/SPI_MOSI bidirectional Port C6 I/O with SPI master-out/slave-in function and programmable fast/slow speed (O3).
34 PC7/SPI_MISO bidirectional Port C7 I/O with SPI master-in/slave-out function and programmable fast/slow speed (O3).
35 PG0/CAN_TX bidirectional Port G0 I/O with standard speed (O1); the CAN transmit function listed for this pin is only available on STM8AF52xx lines, so it is not available on the STM8AF6288.
36 PG1/CAN_RX bidirectional Port G1 I/O with standard speed (O1); the CAN receive function listed for this pin is only available on STM8AF52xx lines, so it is not available on the STM8AF6288.
37 PE3/TIM1_BKIN bidirectional Port E3 I/O with Timer 1 break input function and standard speed (O1).
38 PE2/I2C_SDA bidirectional Port E2 true open-drain I/O (no protection diode to VDD, no weak pull-up) used for I2C data, standard speed (O1).
39 PE1/I2C_SCL bidirectional Port E1 true open-drain I/O (no protection diode to VDD, no weak pull-up) used for I2C clock, standard speed (O1).
40 PE0/CLK_CCO bidirectional Port E0 I/O with configurable clock output CLK_CCO and programmable fast/slow speed (O3).
41 PD0/TIM3_CH2 bidirectional Port D0 high-sink I/O (8 mA) with Timer 3 channel 2 function and programmable fast/slow speed (O3); TIM1_BKIN (AFR3) and CLK_CCO (AFR2) are available after remap.
42 PD1/SWIM bidirectional Port D1 high-sink I/O (8 mA) used as the SWIM data interface; it is input pulled up during the reset phase and after reset release, with fast/slow speed programmable (O4, fast by default).
43 PD2/TIM3_CH1 bidirectional Port D2 high-sink I/O (8 mA) with Timer 3 channel 1 function and programmable fast/slow speed (O3); TIM2_CH3 is available after AFR1 remap.
44 PD3/TIM2_CH2 bidirectional Port D3 high-sink I/O (8 mA) with Timer 2 channel 2 function and programmable fast/slow speed (O3); ADC_ETR is available after AFR0 remap.
45 PD4/TIM2_CH1/BEEP bidirectional Port D4 high-sink I/O (8 mA) with Timer 2 channel 1 function and programmable fast/slow speed (O3); the BEEP output is available after AFR7 remap.
46 PD5/LINUART_TX bidirectional Port D5 I/O with LINUART data transmit function and standard speed (O1).
47 PD6/LINUART_RX bidirectional Port D6 I/O with LINUART data receive function and standard speed (O1).
48 PD7/TLI bidirectional Port D7 I/O with top level interrupt function and standard speed (O1); if configured as an interrupt pin it triggers the TLI.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM8AF6288TCY
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm8af6288tcy-etched.step / stm8af6288tcy-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm8af6288tcy.step / stm8af6288tcy.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (125 pp, sha256 3f11cfe069d4bf98, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF