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STM8AF6288TCX

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM8AF6288TCX from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NRST bidirectional Reset pin (NRST); its input and output characteristics are specified in the NRST pin characteristics table (Table 39).
2 PA1/OSCIN bidirectional Port A1 I/O that doubles as the resonator/crystal oscillator input (OSCIN); in Halt/Active-halt the I/O path is disabled and the weak pull-up depends on HSE wakeup use and Px_CR1 settings (footnote 1).
3 PA2/OSCOUT bidirectional Port A2 I/O that doubles as the resonator/crystal oscillator output (OSCOUT).
4 VSSIO_1 power_in I/O ground for the first I/O group.
5 VSS power_in Digital ground.
6 VCAP passive 1.8 V regulator capacitor pin; the external VCAP capacitor is specified in Section 10.3.1.
7 VDD power_in Digital power supply; the device operates from a 3.3 V to 5.5 V supply.
8 VDDIO_1 power_in I/O power supply for the first I/O group.
9 PA3/TIM2_CH3 bidirectional Port A3 I/O with default alternate function Timer 2 channel 3, remappable to TIM3_CH1 via the AFR1 option bit.
10 PA4/USART_RX bidirectional Port A4 I/O with default alternate function USART receive.
11 PA5/USART_TX bidirectional Port A5 I/O with default alternate function USART transmit.
12 PA6/USART_CK bidirectional Port A6 I/O with default alternate function USART synchronous clock output.
13 VDDA power_in Analog power supply for the ADC.
14 VSSA power_in Analog ground.
15 PB7/AIN7 bidirectional Port B7 I/O with ADC analog input 7.
16 PB6/AIN6 bidirectional Port B6 I/O with ADC analog input 6.
17 PB5/AIN5 bidirectional Port B5 I/O with ADC analog input 5; I2C_SDA is available as an alternate function after remap via the AFR6 option bit.
18 PB4/AIN4 bidirectional Port B4 I/O with ADC analog input 4; I2C_SCL is available as an alternate function after remap via the AFR6 option bit.
19 PB3/AIN3 bidirectional Port B3 I/O with ADC analog input 3; TIM1_ETR is available as an alternate function after remap via the AFR5 option bit.
20 PB2/AIN2 bidirectional Port B2 I/O with ADC analog input 2; TIM1_CH3N is available as an alternate function after remap via the AFR5 option bit.
21 PB1/AIN1 bidirectional Port B1 I/O with ADC analog input 1; TIM1_CH2N is available as an alternate function after remap via the AFR5 option bit.
22 PB0/AIN0 bidirectional Port B0 I/O with ADC analog input 0; TIM1_CH1N is available as an alternate function after remap via the AFR5 option bit.
23 PE7/AIN8 bidirectional Port E7 I/O with ADC analog input 8.
24 PE6/AIN9 bidirectional Port E6 I/O with ADC analog input 9.
25 PE5/SPI_NSS bidirectional Port E5 I/O with SPI master/slave select function.
26 PC1/TIM1_CH1 bidirectional Port C1 high-sink I/O (8 mA) with Timer 1 channel 1 function.
27 PC2/TIM1_CH2 bidirectional Port C2 high-sink I/O (8 mA) with Timer 1 channel 2 function.
28 PC3/TIM1_CH3 bidirectional Port C3 high-sink I/O (8 mA) with Timer 1 channel 3 function.
29 PC4/TIM1_CH4 bidirectional Port C4 high-sink I/O (8 mA) with Timer 1 channel 4 function.
30 PC5/SPI_SCK bidirectional Port C5 I/O with SPI clock function.
31 VSSIO_2 power_in I/O ground for the second I/O group.
32 VDDIO_2 power_in I/O power supply for the second I/O group.
33 PC6/SPI_MOSI bidirectional Port C6 I/O with SPI master out / slave in function.
34 PC7/SPI_MISO bidirectional Port C7 I/O with SPI master in / slave out function.
35 PG0/CAN_TX bidirectional Port G0 I/O with CAN transmit function; the CAN interface is only available on STM8AF52xx product lines, not on this STM8AF62xx part.
36 PG1/CAN_RX bidirectional Port G1 I/O with CAN receive function; the CAN interface is only available on STM8AF52xx product lines, not on this STM8AF62xx part.
37 PE3/TIM1_BKIN bidirectional Port E3 I/O with Timer 1 break input function.
38 PE2/I2C_SDA bidirectional Port E2 true open-drain I/O (no weak pull-up and no protection diode to VDD) carrying the I2C data function.
39 PE1/I2C_SCL bidirectional Port E1 true open-drain I/O (no weak pull-up and no protection diode to VDD) carrying the I2C clock function.
40 PE0/CLK_CCO bidirectional Port E0 I/O with configurable clock output (CLK_CCO) function.
41 PD0/TIM3_CH2 bidirectional Port D0 high-sink I/O (8 mA) with Timer 3 channel 2 function; TIM1_BKIN (AFR3) and CLK_CCO (AFR2) are available as remapped alternate functions.
42 PD1/SWIM bidirectional Port D1 high-sink I/O carrying the SWIM data interface; it is in input pull-up during reset and after reset release.
43 PD2/TIM3_CH1 bidirectional Port D2 high-sink I/O (8 mA) with Timer 3 channel 1 function; TIM2_CH3 is available as a remapped alternate function (AFR1).
44 PD3/TIM2_CH2 bidirectional Port D3 high-sink I/O (8 mA) with Timer 2 channel 2 function; ADC_ETR is available as a remapped alternate function (AFR0).
45 PD4/TIM2_CH1/BEEP bidirectional Port D4 high-sink I/O (8 mA) with Timer 2 channel 1 function; BEEP output is available as a remapped alternate function (AFR7).
46 PD5/LINUART_TX bidirectional Port D5 I/O with LINUART data transmit function.
47 PD6/LINUART_RX bidirectional Port D6 I/O with LINUART data receive function.
48 PD7/TLI bidirectional Port D7 I/O with top level interrupt (TLI) function; if configured as an interrupt pin it triggers the TLI.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM8AF6288TCX
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm8af6288tcx-etched.step / stm8af6288tcx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm8af6288tcx.step / stm8af6288tcx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (125 pp, sha256 3f11cfe069d4bf98, retrieved 2026-10-08, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF