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STM8AF6223PDU
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+56@@ -0,0 +1,56 @@+# STM8AF6223PDU++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · TSSOP-20++STM8AF6223PDU from STMicroelectronics, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PD4/TIM5_CH1/BEEP [LINUART_CK] | bidirectional | Port D4 I/O, high-sink capable, with default function Timer 5 channel 1 / BEEP output; LINUART clock is available only via the AFR2 remap option. |+| 2 | PD5/AIN5/LINUART_TX | bidirectional | Port D5 I/O, high-sink capable, with analog input 5 and LINUART data transmit as default functions. |+| 3 | PD6/AIN6/LINUART_RX | bidirectional | Port D6 I/O, high-sink capable, with analog input 6 and LINUART data receive as default functions. |+| 4 | NRST | bidirectional | Reset pin; reset pin characteristics are specified in Section 9.3.7 of the datasheet. |+| 5 | PA1/OSCIN | bidirectional | Port A1 I/O that serves as resonator/crystal input (OSCIN); in Halt/Active-halt it is automatically set to input weak pull-up and cannot wake the device, so it should be used only as input when Halt/Active-halt is used. |+| 6 | PA2/OSCOUT | bidirectional | Port A2 I/O that serves as resonator/crystal output (OSCOUT). |+| 7 | VSS | power_in | Digital ground. |+| 8 | VCAP | passive | 1.8 V internal regulator capacitor connection; the external capacitor is specified in Section 9.3.1 (VCAP external capacitor). |+| 9 | VDD | power_in | Digital power supply; the device is specified for 3 to 5.5 V operation. |+| 10 | PA3/TIM5_CH3 [SPI_NSS] | bidirectional | Port A3 I/O, high-sink capable, with Timer 5 channel 3 as default function; SPI master/slave select is available via the AFR1 remap option. |+| 11 | PB5/I2C_SDA [TIM1_BKIN] | bidirectional | Port B5 true open-drain I/O (no P-buffer, weak pull-up or VDD protection diode) carrying I2C data, with Timer 1 break input available via the AFR4 remap option. |+| 12 | PB4/I2C_SCL [ADC_ETR] | bidirectional | Port B4 true open-drain I/O (no P-buffer, weak pull-up or VDD protection diode) carrying I2C clock, with ADC external trigger available via the AFR4 remap option. |+| 13 | PC3/TIM1_CH3/[TLI]/[TIM1_CH1N] | bidirectional | Port C3 high-sink capable I/O with Timer 1 channel 3 as default function; top level interrupt (AFR3) and Timer 1 inverted channel 1 (AFR7) are available via remap options. |+| 14 | PC4/TIM1_CH4/CLK_CCO/AIN2/[TIM1_CH2N] | bidirectional | Port C4 high-sink capable I/O with Timer 1 channel 4 and configurable clock output as default functions; analog input 2 (AFR2) and Timer 1 inverted channel 2 (AFR7) are available via remap options. |+| 15 | PC5/SPI_SCK | bidirectional | Port C5 high-sink capable I/O with SPI clock as default function; Timer 5 channel 1 is available via the AFR0 remap option. |+| 16 | PC6/SPI_MOSI [TIM1_CH1] | bidirectional | Port C6 high-sink capable I/O with SPI master out / slave in as default function; Timer 1 channel 1 is available via the AFR0 remap option. |+| 17 | PC7/SPI_MISO [TIM1_CH2] | bidirectional | Port C7 high-sink capable I/O with SPI master in / slave out as default function; Timer 1 channel 2 is available via the AFR0 remap option. |+| 18 | PD1/SWIM | bidirectional | Port D1 high-sink capable I/O carrying the SWIM data interface; the pin is in input pull-up during reset and after internal reset release. |+| 19 | PD2/AIN3 | bidirectional | Port D2 high-sink capable I/O with analog input 3 as default function; Timer 5 channel 3 is available via the AFR1 remap option. |+| 20 | PD3/AIN4/TIM5_CH2/ADC_ETR | bidirectional | Port D3 high-sink capable I/O with analog input 4, Timer 5 channel 2 and ADC external trigger as default functions. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | TSSOP-20 |+| Category | Embedded Processors & Controllers |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `STM8AF6223PDU`+- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`+- 3D model: TSSOP-20 (KiCad packages3D, STEP)+- 3D model files: `stm8af6223pdu-etched.step` / `stm8af6223pdu-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm8af6223pdu.step` / `stm8af6223pdu.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883721252712448) (109 pp, sha256 `1578733d0456cd82`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm8af6223pdu-datasheet.pdf)
page.jsonadded+273@@ -0,0 +1,273 @@+{+ "slug": "stm8af6223pdu",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm8af6223pdu",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm8af6223pdu.kicad_sym",+ "stm8af6223pdu.kicad_mod",+ "stm8af6223pdu.glb",+ "stm8af6223pdu.step",+ "stm8af6223pdu.lbr",+ "docs/hero.png",+ "docs/stm8af6223pdu-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm8af6223pdu-hero.glb",+ "stm8af6223pdu-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM8AF6223PDU",+ "manufacturer": "STMicroelectronics",+ "package": "TSSOP-20",+ "pin_count": 20,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883721252712448",+ "parts": {+ "symbol": "stm8af6223pdu.kicad_sym",+ "footprint": "stm8af6223pdu.kicad_mod",+ "model_3d": "stm8af6223pdu-hero.glb",+ "model_3d_plain": "stm8af6223pdu.glb",+ "model_3d_step": "stm8af6223pdu-etched.step",+ "model_3d_step_plain": "stm8af6223pdu.step",+ "lbr": "stm8af6223pdu.lbr"+ },+ "distributor_links": {+ "lcsc": "C124729",+ "digikey": "497-17904-ND",+ "mouser": "511-STM8AF6223PDU"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T21:37:25Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-17904-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-STM8AF6223PDU",+ "status": "found",+ "lifecycle": "End of Life"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "PD4/TIM5_CH1/BEEP [LINUART_CK]",+ "type": "bidirectional",+ "description": "Port D4 I/O, high-sink capable, with default function Timer 5 channel 1 / BEEP output; LINUART clock is available only via the AFR2 remap option."+ },+ {+ "number": "2",+ "name": "PD5/AIN5/LINUART_TX",+ "type": "bidirectional",+ "description": "Port D5 I/O, high-sink capable, with analog input 5 and LINUART data transmit as default functions."+ },+ {+ "number": "3",+ "name": "PD6/AIN6/LINUART_RX",+ "type": "bidirectional",+ "description": "Port D6 I/O, high-sink capable, with analog input 6 and LINUART data receive as default functions."+ },+ {+ "number": "4",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Reset pin; reset pin characteristics are specified in Section 9.3.7 of the datasheet."+ },+ {+ "number": "5",+ "name": "PA1/OSCIN",+ "type": "bidirectional",+ "description": "Port A1 I/O that serves as resonator/crystal input (OSCIN); in Halt/Active-halt it is automatically set to input weak pull-up and cannot wake the device, so it should be used only as input when Halt/Active-halt is used."+ },+ {+ "number": "6",+ "name": "PA2/OSCOUT",+ "type": "bidirectional",+ "description": "Port A2 I/O that serves as resonator/crystal output (OSCOUT)."+ },+ {+ "number": "7",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground."+ },+ {+ "number": "8",+ "name": "VCAP",+ "type": "passive",+ "description": "1.8 V internal regulator capacitor connection; the external capacitor is specified in Section 9.3.1 (VCAP external capacitor)."+ },+ {+ "number": "9",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital power supply; the device is specified for 3 to 5.5 V operation."+ },+ {+ "number": "10",+ "name": "PA3/TIM5_CH3 [SPI_NSS]",+ "type": "bidirectional",+ "description": "Port A3 I/O, high-sink capable, with Timer 5 channel 3 as default function; SPI master/slave select is available via the AFR1 remap option."+ },+ {+ "number": "11",+ "name": "PB5/I2C_SDA [TIM1_BKIN]",+ "type": "bidirectional",+ "description": "Port B5 true open-drain I/O (no P-buffer, weak pull-up or VDD protection diode) carrying I2C data, with Timer 1 break input available via the AFR4 remap option."+ },+ {+ "number": "12",+ "name": "PB4/I2C_SCL [ADC_ETR]",+ "type": "bidirectional",+ "description": "Port B4 true open-drain I/O (no P-buffer, weak pull-up or VDD protection diode) carrying I2C clock, with ADC external trigger available via the AFR4 remap option."+ },+ {+ "number": "13",+ "name": "PC3/TIM1_CH3/[TLI]/[TIM1_CH1N]",+ "type": "bidirectional",+ "description": "Port C3 high-sink capable I/O with Timer 1 channel 3 as default function; top level interrupt (AFR3) and Timer 1 inverted channel 1 (AFR7) are available via remap options."+ },+ {+ "number": "14",+ "name": "PC4/TIM1_CH4/CLK_CCO/AIN2/[TIM1_CH2N]",+ "type": "bidirectional",+ "description": "Port C4 high-sink capable I/O with Timer 1 channel 4 and configurable clock output as default functions; analog input 2 (AFR2) and Timer 1 inverted channel 2 (AFR7) are available via remap options."+ },+ {+ "number": "15",+ "name": "PC5/SPI_SCK",+ "type": "bidirectional",+ "description": "Port C5 high-sink capable I/O with SPI clock as default function; Timer 5 channel 1 is available via the AFR0 remap option."+ },+ {+ "number": "16",+ "name": "PC6/SPI_MOSI [TIM1_CH1]",+ "type": "bidirectional",+ "description": "Port C6 high-sink capable I/O with SPI master out / slave in as default function; Timer 1 channel 1 is available via the AFR0 remap option."+ },+ {+ "number": "17",+ "name": "PC7/SPI_MISO [TIM1_CH2]",+ "type": "bidirectional",+ "description": "Port C7 high-sink capable I/O with SPI master in / slave out as default function; Timer 1 channel 2 is available via the AFR0 remap option."+ },+ {+ "number": "18",+ "name": "PD1/SWIM",+ "type": "bidirectional",+ "description": "Port D1 high-sink capable I/O carrying the SWIM data interface; the pin is in input pull-up during reset and after internal reset release."+ },+ {+ "number": "19",+ "name": "PD2/AIN3",+ "type": "bidirectional",+ "description": "Port D2 high-sink capable I/O with analog input 3 as default function; Timer 5 channel 3 is available via the AFR1 remap option."+ },+ {+ "number": "20",+ "name": "PD3/AIN4/TIM5_CH2/ADC_ETR",+ "type": "bidirectional",+ "description": "Port D3 high-sink capable I/O with analog input 4, Timer 5 channel 2 and ADC external trigger as default functions."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: MPN decoding: STM8AF6223PDU was matched to the STM8AF6213/STM8AF6223 TSSOP20 table (Table 6, Figure ; Pin 8 VCAP: the datasheet classifies it only as supply (S) with the description '1.8 V regulator cap; Remapped alternate functions in brackets (e.g., [AFR0]-[AFR7]) are only active when the correspondin"+ ],+ "pages_sent": 47,+ "cost_usd": 0.2035,+ "at": "2026-10-07T21:37:05"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883721252712448",+ "pages": 109,+ "sha256": "1578733d0456cd82",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm8af6223pdu.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 6.5,+ 1.2+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm8af6223pdu-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 6.5,+ 1.2+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "973278431467eb1a3f1302fe96a11becaa02dba3da092d6cf6e0b219455e9846",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}