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STM8AF6223PDU
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM8AF6223PDU
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TSSOP-20
STM8AF6223PDU from STMicroelectronics, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PD4/TIM5_CH1/BEEP [LINUART_CK] | bidirectional | Port D4 I/O, high-sink capable, with default function Timer 5 channel 1 / BEEP output; LINUART clock is available only via the AFR2 remap option. |
| 2 | PD5/AIN5/LINUART_TX | bidirectional | Port D5 I/O, high-sink capable, with analog input 5 and LINUART data transmit as default functions. |
| 3 | PD6/AIN6/LINUART_RX | bidirectional | Port D6 I/O, high-sink capable, with analog input 6 and LINUART data receive as default functions. |
| 4 | NRST | bidirectional | Reset pin; reset pin characteristics are specified in Section 9.3.7 of the datasheet. |
| 5 | PA1/OSCIN | bidirectional | Port A1 I/O that serves as resonator/crystal input (OSCIN); in Halt/Active-halt it is automatically set to input weak pull-up and cannot wake the device, so it should be used only as input when Halt/Active-halt is used. |
| 6 | PA2/OSCOUT | bidirectional | Port A2 I/O that serves as resonator/crystal output (OSCOUT). |
| 7 | VSS | power_in | Digital ground. |
| 8 | VCAP | passive | 1.8 V internal regulator capacitor connection; the external capacitor is specified in Section 9.3.1 (VCAP external capacitor). |
| 9 | VDD | power_in | Digital power supply; the device is specified for 3 to 5.5 V operation. |
| 10 | PA3/TIM5_CH3 [SPI_NSS] | bidirectional | Port A3 I/O, high-sink capable, with Timer 5 channel 3 as default function; SPI master/slave select is available via the AFR1 remap option. |
| 11 | PB5/I2C_SDA [TIM1_BKIN] | bidirectional | Port B5 true open-drain I/O (no P-buffer, weak pull-up or VDD protection diode) carrying I2C data, with Timer 1 break input available via the AFR4 remap option. |
| 12 | PB4/I2C_SCL [ADC_ETR] | bidirectional | Port B4 true open-drain I/O (no P-buffer, weak pull-up or VDD protection diode) carrying I2C clock, with ADC external trigger available via the AFR4 remap option. |
| 13 | PC3/TIM1_CH3/[TLI]/[TIM1_CH1N] | bidirectional | Port C3 high-sink capable I/O with Timer 1 channel 3 as default function; top level interrupt (AFR3) and Timer 1 inverted channel 1 (AFR7) are available via remap options. |
| 14 | PC4/TIM1_CH4/CLK_CCO/AIN2/[TIM1_CH2N] | bidirectional | Port C4 high-sink capable I/O with Timer 1 channel 4 and configurable clock output as default functions; analog input 2 (AFR2) and Timer 1 inverted channel 2 (AFR7) are available via remap options. |
| 15 | PC5/SPI_SCK | bidirectional | Port C5 high-sink capable I/O with SPI clock as default function; Timer 5 channel 1 is available via the AFR0 remap option. |
| 16 | PC6/SPI_MOSI [TIM1_CH1] | bidirectional | Port C6 high-sink capable I/O with SPI master out / slave in as default function; Timer 1 channel 1 is available via the AFR0 remap option. |
| 17 | PC7/SPI_MISO [TIM1_CH2] | bidirectional | Port C7 high-sink capable I/O with SPI master in / slave out as default function; Timer 1 channel 2 is available via the AFR0 remap option. |
| 18 | PD1/SWIM | bidirectional | Port D1 high-sink capable I/O carrying the SWIM data interface; the pin is in input pull-up during reset and after internal reset release. |
| 19 | PD2/AIN3 | bidirectional | Port D2 high-sink capable I/O with analog input 3 as default function; Timer 5 channel 3 is available via the AFR1 remap option. |
| 20 | PD3/AIN4/TIM5_CH2/ADC_ETR | bidirectional | Port D3 high-sink capable I/O with analog input 4, Timer 5 channel 2 and ADC external trigger as default functions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TSSOP-20 |
| Category | Embedded Processors & Controllers |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
STM8AF6223PDU - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
stm8af6223pdu-etched.step/stm8af6223pdu-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm8af6223pdu.step/stm8af6223pdu.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (109 pp, sha256
1578733d0456cd82, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).