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STM8AF6223PDAU

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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STM8AF6223PDAU

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TSSOP-20

STM8AF6223PDAU from STMicroelectronics, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PD4 bidirectional High-sink I/O port configured as Timer 5 channel 1, BEEP output (1-4 kHz), SPI master/slave select, or LINUART clock with [AFR2] remapping option.
2 PD5 bidirectional High-sink I/O port functioning as analog input channel 5 (AIN5) or LINUART data transmit line, 10-bit ADC conversion with ±1 LSB accuracy.
3 PD6 bidirectional High-sink I/O port functioning as analog input channel 6 (AIN6) or LINUART data receive line, 10-bit ADC conversion with ±1 LSB accuracy.
4 NRST input Active-low asynchronous reset input with internal pull-up resistor (30-80 kΩ), triggers device reset when voltage falls below 0.3×VDD threshold.
5 PA1 bidirectional I/O port or high-speed external oscillator input (OSCIN) for 1-16 MHz crystal/resonator, weak pull-up in Halt/Active-halt mode.
6 PA2 bidirectional I/O port or high-speed external oscillator output (OSCOUT) for HSE crystal/resonator feedback connection.
7 VSS power_in Digital ground connection, must be connected to system ground reference.
8 VCAP passive 1.8 V internal regulator capacitor connection requiring external 470-3300 nF capacitor with ESR ≤0.3 Ω and ESL ≤15 nH.
9 VDD power_out Digital power supply pin, operating voltage 3.0-5.5 V, maximum total source current 100 mA into VDD.
10 PB5 bidirectional True open-drain I/O port with I2C data line (SDA) or Timer 1 break input [AFR4] remapping, pull-up resistor 30-80 kΩ, no internal protection diodes.
11 PB4 bidirectional True open-drain I/O port with I2C clock line (SCL) or ADC external trigger [AFR4] remapping, pull-up resistor 30-80 kΩ, no internal protection diodes.
12 PB1 bidirectional High-sink I/O port configured as Timer 1 inverted channel 2 output or analog input channel 1 (AIN1), 10-bit ADC conversion with ±1 LSB accuracy.
13 PB0 bidirectional High-sink I/O port configured as Timer 1 inverted channel 1 output or analog input channel 0 (AIN0), 10-bit ADC conversion with ±1 LSB accuracy.
14 PC4 bidirectional High-sink I/O port with Timer 1 channel 4, configurable clock output (CLK_CCO), analog input 2 [AFR2], or Timer 1 inverted channel 2 [AFR7] remapping option.
15 PC5 bidirectional High-sink I/O port with SPI clock line (SCK) or Timer 5 channel 1 [AFR0] remapping, maximum SPI speed 8 Mbit/s master or 6 Mbit/s slave mode.
16 PC6 bidirectional High-sink I/O port with SPI master out/slave in (MOSI) or Timer 1 channel 1 [AFR0] remapping, maximum SPI speed 8 Mbit/s master or 6 Mbit/s slave mode.
17 PC7 bidirectional High-sink I/O port with SPI master in/slave out (MISO) or Timer 1 channel 2 [AFR0] remapping, maximum SPI speed 8 Mbit/s master or 6 Mbit/s slave mode.
18 PD1 bidirectional High-sink I/O port with SWIM single-wire debug interface for programming and in-circuit debugging, weak pull-up during reset phase and after release.
19 PD2 bidirectional High-sink I/O port functioning as analog input channel 3 (AIN3) [AFR2] or Timer 5 channel 3 [AFR1] remapping, 10-bit ADC conversion with ±1 LSB accuracy.
20 PD3 bidirectional High-sink I/O port with analog input channel 4 (AIN4), Timer 5 channel 2 (TIM5_CH2), and ADC external trigger (ADC_ETR) capability, 10-bit ADC with ±1 LSB accuracy.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TSSOP-20
Category Embedded Processors & Controllers
Pins 20

CAD (KiCad official)

  • Symbol: STM8AF6223PDAU
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: stm8af6223pdau-etched.step / stm8af6223pdau-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm8af6223pdau.step / stm8af6223pdau.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (112 pp, sha256 d9cd5dcf0815e39e, retrieved 2026-09-24, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF