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STM806SM6F
Public Made by Adomby adom
STMicroelectronics Supervisor And Reset ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM806SM6F
STMicroelectronics · Supervisor And Reset ICs · SOIC-8
STM806SM6F from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | When VCC is above the switchover voltage (VSO), VOUT is connected to VCC through a P-channel MOSFET switch, and when VCC falls below VSO, VBAT connects to VOUT; connect to VCC if no battery is used. |
| 2 | VCC | power_in | Supply voltage input; reset is guaranteed valid down to VCC = 1 V without a backup battery. |
| 3 | VSS | power_in | Ground reference for the device. |
| 4 | PFI | input | When PFI is less than VPFI or VCC falls below VSW (2.4 V), PFO goes low; connect to ground if unused. |
| 5 | PFO | output | Push-pull power-fail output that goes low when PFI is less than VPFI or VCC falls below VSW, and is left open if unused. |
| 6 | MR | input | Active-low push-button reset input with an internal 40 kΩ pull-up that asserts reset while low and for trec after it returns high; leave open if unused. |
| 7 | RST | output | Active-low reset output that stays low whenever VCC is below the reset threshold or MR is low, and for trec after either condition clears. |
| 8 | VBAT | power_in | Backup battery input; when VCC falls below VSO, VOUT switches from VCC to VBAT, and VBAT may exceed VCC; connect to VCC if no battery is used. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating voltage (VCC, VBAT) | VCC, VBAT | 1.1 | 5.5 | V | TA = -40 to +85 °C | 32 | |
| Supply voltage VCC/VBAT (recommended operating) | 1 | 5.5 | V | 31 | |||
| Ambient operating temperature | TA | -40 | 85 | °C | 31 | ||
| VCC supply current | ICC | 40 | 60 | µA | Excluding IOUT (VCC < 5.5 V) | 32 | |
| VCC supply current | ICC | 35 | 50 | µA | Excluding IOUT (VCC < 3.6 V) | 32 | |
| VCC supply current in battery backup mode | ICC | 25 | 35 | µA | Excluding IOUT (VBAT = 2.3 V, VCC = 2.0 V, MR = VCC) | 32 | |
| VBAT supply current in battery backup mode | IBAT | 0.4 | 1 | µA | Excluding IOUT (VBAT = 3.6 V) | 32 | |
| VCC to VOUT on-resistance | 3 | 4 | Ω | 32 | |||
| VBAT to VOUT on-resistance | 100 | Ω | 33 | ||||
| Input leakage current (MR) | ILI | 20 | 75 | 350 | µA | MR = 0 V, VCC = 3 V (STM704/806 only) | 33 |
| Input leakage current (PFI) | ILI | -20 | 2 | 25 | nA | 0 V < VIN < VCC | 33 |
| Output low voltage (PFO, RST, Vccsw) | VOL | 0.3 | V | VCC = VRST (max), ISINK = 3.2 mA | 33 | ||
| Output low voltage (RST) | VOL | 0.3 | V | IOL = 40 µA, VCC = 1.0 V, VBAT = VCC, TA = 0 °C to 85 °C | 33 | ||
| Output high voltage (RST) | VOH | 2.4 | V | ISOURCE = 1 mA, VCC = VRST (max) | 33 | ||
| PFI input threshold (STM802/804/806) | VPFI | 1.212 | 1.237 | 1.262 | V | PFI falling (VCC < 3.6 V) | 33 |
| PFI hysteresis | 10 | 20 | mV | PFI rising (VCC < 3.6 V) | 33 | ||
| PFI to PFO propagation delay | tPFD | 2 | µs | 33 | |||
| PFO output short to GND current | ISC | 0.1 | 0.75 | 2 | mA | VCC = 3.6 V, PFO = 0 V | 34 |
| Battery backup switchover voltage | VSW | 2.4 | V | 34 | |||
| Battery switchover hysteresis | 40 | mV | 34 | ||||
| Reset threshold STM802S/804S/806S | VRST | 2.88 | 2.925 | 3 | V | VCC falling | 34 |
| Reset threshold STM802S/804S/806S | VRST | 2.88 | 2.935 | 3.02 | V | VCC rising | 34 |
| RST pulse width | trec | 140 | 200 | 280 | ms | VCC < 3.6 V | 34 |
| MR to RST output delay | tMLRL | 60 | 500 | ns | 34 | ||
| Storage temperature (VCC off) | TSTG | -55 | 150 | °C | VCC off | 30 | |
| Lead solder temperature | TSLD | 260 | °C | for 10 seconds | 30 | ||
| Supply voltage (VCC/VBAT) | VCC/VBAT | -0.3 | 6 | V | 30 | ||
| Output current | IO | 20 | mA | 30 | |||
| Power dissipation | PD | 320 | mW | 30 |
CAD (KiCad official)
- Symbol:
STM806SM6F - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
stm806sm6f-etched.step/stm806sm6f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm806sm6f.step/stm806sm6f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (42 pp, sha256
7b0e1b14da4b9b31, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).