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STM795TM6F

Public Made by Adom

by adom

STMicroelectronics Supervisor And Reset ICs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)stm795tm6ffactory-2.0.0extractor-text
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STM795TM6F

STMicroelectronics · Supervisor And Reset ICs · SO-8

STM795TM6F from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Supply output for the external LPSRAM: VOUT connects to VCC through a P-channel MOSFET switch when VCC is above VSO, switches to VBAT when VCC falls below VSO, and should be connected to VCC if no battery is used.
2 VCC power_in Supply voltage input; RST is asserted whenever VCC is below the reset threshold VRST and is guaranteed valid down to VCC = 1 V when no backup battery is used.
3 Vccsw output Push-pull output that goes high when VOUT switches to the battery and low when it switches back to VCC, and can drive an external PMOS transistor for IOUT requirements above 75 mA.
4 VSS power_in Ground reference pin for the device.
5 E input Input to the chip enable gating circuit, which should be connected to ground if unused.
6 ECON output Conditional chip enable output that goes low only when E is low and reset is not asserted, remains low for 15 µs or until E goes high if reset is asserted while low, and is pulled up to VOUT in the disabled mode.
7 RST output Active-low reset output that pulses low for trec when triggered and stays low whenever VCC is below the reset threshold or MR is a logic low.
8 VBAT power_in Backup battery input that connects to VOUT when VCC falls below VSO; it may exceed VCC and should be connected to VCC if no battery is used.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SO-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: STM795TM6F
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: stm795tm6f-etched.step / stm795tm6f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm795tm6f.step / stm795tm6f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (42 pp, sha256 7b0e1b14da4b9b31, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF