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STM795RM6F

Public Made by Adom

by adom

STMicroelectronics Supervisor And Reset ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)stm795rm6ffactory-2.0.0extractor-text
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README.md Initial commit: component/stm795rm6f · Ray 1d ago
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STM795RM6F

STMicroelectronics · Supervisor And Reset ICs · SOIC-8

STM795RM6F from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Supply output for the external LPSRAM: it connects to VCC through a P-channel switch when VCC is above the switchover voltage VSO, and connects to VBAT when VCC falls below VSO.
2 VCC power_in Supply voltage input; for the R suffix the reset threshold VRST is 2.55 V to 2.70 V, and the datasheet gives no other VCC operating limit in the pages provided.
3 VCCSW output Push-pull output that is high when VOUT has switched to the battery and low when VOUT is connected to VCC, and can drive an external PMOS for IOUT requirements above 75 mA.
4 VSS power_in Ground reference pin for the device.
5 E input Chip enable input to the chip enable gating circuit; connect to ground if unused.
6 ECON output Conditioned chip enable output that goes low only when E is low and reset is not asserted, and is pulled up to VOUT in the disabled mode.
7 RST output Push-pull active-low reset output that pulses low for trec when triggered and stays low whenever VCC is below the reset threshold, remaining low for trec after VCC rises above it.
8 VBAT power_in Backup battery input that may exceed VCC; when VCC falls below VSO, VOUT switches from VCC to VBAT, and VOUT reconnects to VCC when VCC rises above VSO plus hysteresis.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOIC-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: STM795RM6F
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: stm795rm6f-etched.step / stm795rm6f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm795rm6f.step / stm795rm6f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (42 pp, sha256 7b0e1b14da4b9b31, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF