component
STM795RM6F
Public Made by Adomby adom
STMicroelectronics Supervisor And Reset ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+44@@ -0,0 +1,44 @@+# STM795RM6F++**STMicroelectronics** · Supervisor And Reset ICs · SOIC-8++STM795RM6F from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VOUT | power_out | Supply output for the external LPSRAM: it connects to VCC through a P-channel switch when VCC is above the switchover voltage VSO, and connects to VBAT when VCC falls below VSO. |+| 2 | VCC | power_in | Supply voltage input; for the R suffix the reset threshold VRST is 2.55 V to 2.70 V, and the datasheet gives no other VCC operating limit in the pages provided. |+| 3 | VCCSW | output | Push-pull output that is high when VOUT has switched to the battery and low when VOUT is connected to VCC, and can drive an external PMOS for IOUT requirements above 75 mA. |+| 4 | VSS | power_in | Ground reference pin for the device. |+| 5 | E | input | Chip enable input to the chip enable gating circuit; connect to ground if unused. |+| 6 | ECON | output | Conditioned chip enable output that goes low only when E is low and reset is not asserted, and is pulled up to VOUT in the disabled mode. |+| 7 | RST | output | Push-pull active-low reset output that pulses low for trec when triggered and stays low whenever VCC is below the reset threshold, remaining low for trec after VCC rises above it. |+| 8 | VBAT | power_in | Backup battery input that may exceed VCC; when VCC falls below VSO, VOUT switches from VCC to VBAT, and VOUT reconnects to VCC when VCC rises above VSO plus hysteresis. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SOIC-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `STM795RM6F`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `stm795rm6f-etched.step` / `stm795rm6f-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm795rm6f.step` / `stm795rm6f.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588939953556766720) (42 pp, sha256 `7b0e1b14da4b9b31`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm795rm6f-datasheet.pdf)
page.jsonadded+200@@ -0,0 +1,200 @@+{+ "slug": "stm795rm6f",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Supervisor And Reset ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "stm795rm6f",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm795rm6f.kicad_sym",+ "stm795rm6f.kicad_mod",+ "stm795rm6f.glb",+ "stm795rm6f.step",+ "stm795rm6f.lbr",+ "docs/hero.png",+ "docs/stm795rm6f-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm795rm6f-hero.glb",+ "stm795rm6f-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM795RM6F",+ "manufacturer": "STMicroelectronics",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Power Management (PMIC)",+ "subcategory": "Supervisor And Reset ICs",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588939953556766720",+ "parts": {+ "symbol": "stm795rm6f.kicad_sym",+ "footprint": "stm795rm6f.kicad_mod",+ "model_3d": "stm795rm6f-hero.glb",+ "model_3d_plain": "stm795rm6f.glb",+ "model_3d_step": "stm795rm6f-etched.step",+ "model_3d_step_plain": "stm795rm6f.step",+ "lbr": "stm795rm6f.lbr"+ },+ "distributor_links": {+ "lcsc": "C2067424",+ "digikey": "497-3845-2-ND",+ "mouser": "511-STM795RM6F"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T20:46:52Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-3845-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-STM795RM6F",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VOUT",+ "type": "power_out",+ "description": "Supply output for the external LPSRAM: it connects to VCC through a P-channel switch when VCC is above the switchover voltage VSO, and connects to VBAT when VCC falls below VSO."+ },+ {+ "number": "2",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage input; for the R suffix the reset threshold VRST is 2.55 V to 2.70 V, and the datasheet gives no other VCC operating limit in the pages provided."+ },+ {+ "number": "3",+ "name": "VCCSW",+ "type": "output",+ "description": "Push-pull output that is high when VOUT has switched to the battery and low when VOUT is connected to VCC, and can drive an external PMOS for IOUT requirements above 75 mA."+ },+ {+ "number": "4",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference pin for the device."+ },+ {+ "number": "5",+ "name": "E",+ "type": "input",+ "description": "Chip enable input to the chip enable gating circuit; connect to ground if unused."+ },+ {+ "number": "6",+ "name": "ECON",+ "type": "output",+ "description": "Conditioned chip enable output that goes low only when E is low and reset is not asserted, and is pulled up to VOUT in the disabled mode."+ },+ {+ "number": "7",+ "name": "RST",+ "type": "output",+ "description": "Push-pull active-low reset output that pulses low for trec when triggered and stays low whenever VCC is below the reset threshold, remaining low for trec after VCC rises above it."+ },+ {+ "number": "8",+ "name": "VBAT",+ "type": "power_in",+ "description": "Backup battery input that may exceed VCC; when VCC falls below VSO, VOUT switches from VCC to VBAT, and VOUT reconnects to VCC when VCC rises above VSO plus hysteresis."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Package variant: the MPN STM795RM6F decodes to device STM795, reset threshold R (VRST 2.55 V to 2.70; Figure 6 (page 8) pin-label text is garbled in the extracted text; pin numbers were taken from Table; The datasheet pin table gives no separate descriptions for VCC, VSS, or VBAT beyond their function a"+ ],+ "pages_sent": 17,+ "cost_usd": 0.0807,+ "at": "2026-10-08T20:46:17"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588939953556766720",+ "pages": 42,+ "sha256": "7b0e1b14da4b9b31",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm795rm6f.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm795rm6f-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "7e33d3eef09c04de2ce4e24a6c7ea681c7ba5c5e6ba1f2a97ea47c7d86ac2e2a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}