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STM705M6F

STMicroelectronics · Supervisor And Reset ICs · SO-8

STM705M6F from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MR input A logic low on MR asserts reset, which remains asserted while MR is low and for trec after it returns high, and the input has an internal pull-up so it may be left open if unused.
2 VCC power_in Supply voltage monitored against the reset threshold VRST, with an operating range of 1.2 V to 5.5 V per Table 6.
3 VSS power_in Ground reference for the device.
4 PFI input Power-fail input compared to an internal threshold VPFI of 1.20 V to 1.30 V; PFO goes low when PFI is below VPFI, and PFI should be connected to VSS if the comparator is unused.
5 PFO output Push-pull power-fail output that goes low when PFI is less than VPFI and otherwise remains high, and it may be left open if unused.
6 WDI input Watchdog input; if WDI stays high or low for 1.6 s the watchdog times out and triggers reset (or WDO), and the watchdog is disabled by letting WDI float.
7 RST output Active-low reset output that is forced low when VCC is below the reset threshold or MR is low, and remains low for trec after VCC rises above the threshold or MR returns high.
8 WDO output Push-pull watchdog output that goes low when WDI is not toggled within 1.6 s or when VCC falls below the reset threshold, and goes high as soon as VCC exceeds the reset threshold.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SO-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating voltage VCC 1.2 5.5 V 25
Input leakage current (MR) ILI 75 125 300 μA 4.5 V < VCC < 5.5 V 25
Input high voltage (MR) VIH 2 V 4.5 V < VCC < 5.5 V 25
Input low voltage (MR) VIL 0.8 V 4.5 V < VCC < 5.5 V 25
Input high voltage (WDI) VIH 0.7 V VRST (max) < VCC < 5.5 V 25
Input low voltage (WDI) VIL 0.3 V VRST (max) < VCC < 5.5 V 25
Output low voltage (PFO, RST, RST, WDO) VOL 0.3 V VCC = VRST (max), ISINK = 3.2 mA 25
Output low voltage (RST) VOL 0.3 V ISINK = 50 μA, VCC = 1.0 V, TA = 0 °C to 85 °C 25
Output high voltage (RST, RST, WDO) VOH 2.4 V ISOURCE = 1 mA, VCC = VRST (max) 25
Output high voltage (PFO) VOH 0.8 V ISOURCE = 75 μA, VCC = VRST (max) 25
Output high voltage (RST) VOH 0.8 V ISOURCE = 4 μA, VCC = 1.1 V, TA = 0 °C to 85 °C 25
Output high voltage (RST) VOH 0.9 V ISOURCE = 4 μA, VCC = 1.2 V 25
VCC supply current ICC 25 60 μA 25
Input leakage current (PFI) ILI -25 2 25 nA 0 V < VIN < VCC 25
Input leakage current (WDI) WDI = VCC ILI 120 160 μA WDI = VCC, time average 25
Input leakage current (WDI) WDI = GND ILI -20 -15 μA WDI = GND, time average 25
PFI input threshold VPFI 1.2 1.25 1.3 V PFI falling (VCC = 5 V) 25
PFI to PFO propagation delay tPFD 2 μs 25
Reset threshold (STM705/707/813L) VRST 4.5 4.65 4.75 V STM705/707/813L; VCC falling 26
Reset threshold hysteresis 25 mV 26
RST pulse width (blank suffix) trec 140 200 280 ms Blank (see Table 9) 26
MR pulse width tMLMH 150 ns 26
MR to RST output delay tMLRL 250 ns 26
Watchdog timeout period tWD 1.12 1.6 2.24 s 4.5 V < VCC < 5.5 V 26
WDI pulse width 50 ns 4.5 V < VCC < 5.5 V 26
Storage temperature (VCC Off) TSTG -55 150 °C VCC Off 22
Lead solder temperature for 10 seconds TSLD 260 °C Reflow at peak temperature of 260 °C; time above 255 °C must not exceed 30 seconds 22
Input or output voltage VIO -0.3 V Referenced to VCC +0.3 V 22
Supply voltage VCC -0.3 7 V 22
Output current IO 20 mA 22
Power dissipation PD 320 mW 22
Ambient operating temperature TA -40 85 °C 23

CAD (KiCad official)

  • Symbol: STM705M6F
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: stm705m6f-etched.step / stm705m6f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm705m6f.step / stm705m6f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (33 pp, sha256 8dd84b398c8ff01b, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF