Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

STM704SM6F

STMicroelectronics · Supervisor And Reset ICs · SO-8

STM704SM6F from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT output Regulated supply output that switches between VCC and VBAT based on VSO threshold, sourcing up to 75 mA with VCC - 0.15 V typical drop.
2 VCC power_in Main supply voltage input operating from 1.0 to 5.5 V; device asserts RST when VCC falls below VRST threshold (2.925 V typical for STM704S).
3 VSS power_in Ground reference and common return path for all device currents.
4 PFI input Power-fail input compared to VPFI threshold (1.237 V typical) and VSW (2.4 V), causing PFO to go low when below either voltage.
5 PFO output Push-pull power-fail output that goes low within 2 µs when PFI < 1.237 V typical or VCC < 2.4 V, providing early power-failure warning.
6 MR input Active-low manual reset input with 40 kΩ internal pull-up that asserts RST for minimum 20 ns pulse width and holds reset for trec (200 ms typical) after release.
7 RST output Push-pull active-low reset output that pulses low for trec (200 ms typical) when VCC falls below VRST, and is guaranteed valid down to VCC = 1.0 V with backup battery.
8 VBAT power_in Backup battery supply input supporting automatic switchover at VSO (2.4 V); may exceed VCC; supplies external LPSRAM with 0.4 µA quiescent current during battery backup mode.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SO-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: STM704SM6F
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: stm704sm6f-etched.step / stm704sm6f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm704sm6f.step / stm704sm6f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (42 pp, sha256 7b0e1b14da4b9b31, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF