main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 2d ago
viewers stm6823zwy6f: viewers · Ray 2d ago
package.json Publish 0.1.0 · Ray 2d ago
page.json Set visibility: public · Ray 2d ago
README.md Initial commit: component/stm6823zwy6f · Ray 2d ago
stm6823zwy6f-etched.glb stm6823zwy6f: factory component page (tier=lcsc) · Ray 2d ago
stm6823zwy6f-etched.step stm6823zwy6f: factory component page (tier=lcsc) · Ray 2d ago
stm6823zwy6f-hero.glb stm6823zwy6f: hero GLB from the etched model (keeps the MPN mark) · Ray 1d ago
stm6823zwy6f-hero.overlay.json Publish 0.1.0 · Ray 2d ago
stm6823zwy6f.glb Publish 0.1.0 · Ray 2d ago
stm6823zwy6f.kicad_mod Publish 0.1.0 · Ray 2d ago
stm6823zwy6f.kicad_sym Publish 0.1.0 · Ray 2d ago
stm6823zwy6f.lbr Publish 0.1.0 · Ray 2d ago
stm6823zwy6f.step Publish 0.1.0 · Ray 2d ago

STM6823ZWY6F

STMicroelectronics · Supervisor And Reset ICs · SOT-23-5

STM6823ZWY6F from STMicroelectronics, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RST output Active low, push-pull reset output that pulses low when triggered and stays low whenever VCC is below the reset threshold or MR is logic low, remaining low for trec after VCC recovers, a watchdog reset, or MR returns high.
2 VSS power_in Ground reference for the supervisor (GND).
3 MR input Active low push-pull reset input; a logic low asserts reset and reset stays asserted while MR is low and for trec after it returns high, with an internal 52 kΩ pull-up (35 to 75 kΩ) so it may be left open if unused.
4 WDI input Watchdog input; if WDI stays high or low for at least 1.6 s (typ.) reset is asserted, the timer clears on any rising or falling edge (pulses as short as 50 ns), and leaving WDI unconnected disables the watchdog.
5 VCC power_in Supply voltage with operating range 1.2 V to 5.5 V (reset guaranteed valid down to VCC = 1.0 V for TA = 0 to 85 °C); absolute maximum VCC is 7.0 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: STM6823ZWY6F
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: stm6823zwy6f-etched.step / stm6823zwy6f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm6823zwy6f.step / stm6823zwy6f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (31 pp, sha256 ba50f0fd6706f830, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF