component
STM6777TWWB6F
Public Made by Adomby adom
STMicroelectronics Monitors & Reset Circuits, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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STM6777TWWB6F
STMicroelectronics · Monitors & Reset Circuits · SOT-23-6
STM6777TWWB6F from STMicroelectronics, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RST | output | Active-low open-drain reset output (STM6777) driven low when VCC1 or VCC2 falls below its threshold or MR is low, held for trec after all supplies recover; needs an external pull-up (10 kΩ typical) to VCC1 and is valid for VCC1 or VCC2 ≥ 0.8 V. |
| 2 | VSS | power_in | Ground. |
| 3 | MR | input | Active-low push-button manual reset input with internal 50 kΩ pull-up to VCC1 (25 to 80 kΩ), leave open or tie to VCC1 if unused. |
| 4 | VCC2 | power_in | Secondary supply voltage monitoring input with factory-programmed reset threshold from 3.08 V to 0.79 V. |
| 5 | MRC | passive | Manual reset delay input, left open or connected to VSS through a capacitor to delay the manual reset by 6 µs or more. |
| 6 | VCC1 | power_in | Primary supply voltage input and primary reset threshold monitor with factory-programmed thresholds from 4.63 V to 1.58 V, operating range 0.8 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOT-23-6 |
| Category | Power Management ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC1 reset threshold (T, falling) | VRST1 | 3 | 3.075 | 3.15 | V | T (falling) | 19 |
| VCC2 reset threshold (W, falling) | VRST2 | 1.62 | 1.665 | 1.71 | V | W (falling) | 20 |
| RST pulse width | trec | 140 | 210 | 280 | ms | blank option | 20 |
| Operating voltage | VCC | 0.8 | 5.5 | V | 19 | ||
| VCC1 supply current | ICC1 | 12 | 35 | µA | VCC1 < 5.5 V, all I/O pins open | 19 | |
| VCC1 supply current | ICC1 | 8 | 23 | µA | VCC1 < 3.6 V, all I/O pins open | 19 | |
| VCC2 supply current | ICC2 | 3 | 9 | µA | VCC2 < 3.6 V, all I/O pins open | 19 | |
| VCC2 supply current | ICC2 | 2.5 | 7 | µA | VCC2 < 2.75 V, all I/O pins open | 19 | |
| Input leakage current | ILI | -1 | 1 | µA | 0 V = VIN = VCC | 19 | |
| Open drain RST output leakage current | ILO | 0.5 | µA | VCC1 > VRST1, VCC2 > VRST2; RST not asserted | 19 | ||
| Output low voltage | VOL | 0.3 | V | VCC1 or VCC2 ≥ 0.8 V, ISINK = 1 µA, RST asserted | 19 | ||
| Output low voltage | VOL | 0.4 | V | VCC1 or VCC2 ≥ 4.5 V, ISINK = 3.2 mA, RST asserted | 19 | ||
| VCC1 to RST delay | tRD | 20 | µs | VCC1 = (VRST1 + 100 mV) to (VRST, 100 mV) | 20 | ||
| VCC2 to RST delay | tRD | 20 | µs | VCC2 = (VRST2 + 75 mV) to (VRST2, 75 mV) | 20 | ||
| MR minimum pulse width | tMLMH | 6 | µs | MRC connected via capacitor to VSS | 21 | ||
| MR to RST output delay | tMLRL | 200 | ns | 21 | |||
| MR pull-up resistance | 25 | 50 | 80 | kΩ | 21 | ||
| Reset threshold hysteresis | VHYST | 0.5 | % | Referenced to VRST typical | 20 | ||
| Ambient operating temperature | TA | -40 | 85 | °C | 18 | ||
| Storage temperature | TSTG | -55 | 150 | °C | VCC off | 17 | |
| Lead solder temperature | TSLD | 260 | °C | 10 seconds; reflow peak 260 °C, time above 255 °C not exceeding 30 s | 17 | ||
| Supply voltage | VCC1, VCC2 | -0.3 | 7 | V | 17 | ||
| Input or output voltage | VIO | -0.3 | V | upper limit VCC1 + 0.3 V / VCC2 + 0.3 V | 17 | ||
| Input or output current (all pins) | IIO | 20 | mA | 17 | |||
| Power dissipation | PD | 675 | mW | SOT23-6 | 17 |
CAD (KiCad official)
- Symbol:
STM6777TWWB6F - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
stm6777twwb6f-etched.step/stm6777twwb6f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm6777twwb6f.step/stm6777twwb6f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (30 pp, sha256
1dd8d7f2d8316ee8, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).