Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

STM6601BS2BDM6F

STMicroelectronics · Supervisor And Reset ICs · TDFN-12(2x3)

STM6601BS2BDM6F from STMicroelectronics, in a TDFN-12(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Power supply input operating at 1.6 V to 5.5 V, requires 0.1 µF decoupling capacitor placed as close to device as possible.
2 SR input Smart Reset™ button input with factory-trimmed voltage detector and ±8 kV HBM ESD protection, active low with optional internal 100 kΩ pull-up resistor.
3 VREF power_in Precise 1.5 V voltage reference output with 1% accuracy, requires mandatory 1 µF capacitor, output enabled after RST deasserts and disabled in standby mode.
4 PSHOLD input Power-supply hold input with factory-trimmed voltage detector and internal pull-down during startup, confirms correct power-up or initiates shutdown.
5 CSRD passive Smart Reset™ delay time capacitor input charged with ISRD current to set additional delay tSRD, leave pin open if capacitor not used.
6 PB input Push-button power-on input with factory-trimmed voltage detector and ±8 kV HBM ESD protection, active low with internal 100 kΩ pull-up resistor and switch to ground.
7 VCCLO output Active low open-drain output indicating VCC above VTH+ threshold or undervoltage detection, requires pull-up resistor, floating in standby mode.
8 PBOUT output Active low open-drain output indicating PB push-button input status with tDEBOUNCE response time, requires pull-up resistor.
9 EN output Push-pull enable output (active low variant) controlling system power, asserted low after valid turn-on confirmation and released high on power-down conditions.
10 RST output Active low open-drain reset output asserted for tREC (240 ms minimum) during startup or after long push detection, requires pull-up resistor.
11 INT output Active low open-drain interrupt output asserted for minimum tINT_Min during push-button interrupt or undervoltage detection in normal operation, requires pull-up resistor.
12 GND power_in Ground reference pin.
13 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TDFN-12(2x3)
Category Power Management (PMIC)
Pins 13

CAD (KiCad official)

  • Symbol: STM6601BS2BDM6F
  • Footprint: Package_DFN_QFN:DFN-12-1EP_2x3mm_P0.45mm_EP0.64x2.4mm
  • 3D model: TDFN-12(2x3) (KiCad packages3D, STEP)
  • 3D model files: stm6601bs2bdm6f-etched.step / stm6601bs2bdm6f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm6601bs2bdm6f.step / stm6601bs2bdm6f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (52 pp, sha256 24305a688f436ae9, retrieved 2026-10-03, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF